10

GND2

0.1 μF

Bypass Cap

OUTPUT Vo

MONITORING

NODE

SHIELD

1

3

6

4

5

Rin=700

Vdd=5 V

ACPL-M72U

GND1

INPUT

MONITORING

NODE

PULSE GEN.

0

2

2

0.8 V

GND2

0.1 μF

Bypass Cap

OUTPUT Vo

MONITORING

NODE

SHIELD

+

−

1

3

6

4

5

R1=350

Vdd=5 V

R2=350

High Voltage Pulse

ACPL-M72U

GND2

0.1 μF

Bypass Cap

OUTPUT Vo

MONITORING

NODE

SHIELD

+

−

1

3

6

4

5

R1=350

Vdd=5 V

R2=350

High Voltage Pulse

ACPL-M72U

Vin =

4.5 - 5.5V

Figure 15. Low Power Mode High CMR, CMH Test Circuit

Figure 16. Low Power Mode High CMR, CML Test Circuit

ACPL-M72U Low Power Mode:

Figure 14. Low Power Mode Switching Test Circuit and Typical Waveform