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HDSP-2132 Datasheet(PDF) 6 Page - AVAGO TECHNOLOGIES LIMITED

Part # HDSP-2132
Description  Eight Character 5.0 mm (0.2 inch) Glass/Ceramic Intelligent 5x7 Alphanumeric Displays for Military Applications
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Manufacturer  AVAGO [AVAGO TECHNOLOGIES LIMITED]
Direct Link  http://www.avagotech.com
Logo AVAGO - AVAGO TECHNOLOGIES LIMITED

HDSP-2132 Datasheet(HTML) 6 Page - AVAGO TECHNOLOGIES LIMITED

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6
AC Timing Characteristics over Temperature Range
VDD = 4.5 to 5.5 V unless otherwise specified
Reference
Number
Symbol
Description
Min.[1]
Units
1tACC
Display Access Time
Write
210
Read
230
ns
2tACS
Address Setup Time to Chip Enable
10
ns
3tCE
Chip Enable Active Time[2,3]
Write
140
Read
160
ns
4tACH
Address Hold Time to Chip Enable
20
ns
5tCER
Chip Enable Recovery Time
60
ns
6tCES
Chip Enable Active Prior to Rising Edge of[1,2]
Write
140
Read
160
ns
7tCEH
Chip Enable Hold Time to Rising Edge of
Read/Write Signal[2,3]
0ns
8tW
Write Active Time[2,3]
100
ns
9tWD
Data Valid Prior to Rising Edge of Write Signal
50
ns
10
tDH
Data Write Hold Time
20
ns
11
tR
Chip Enable Active Prior to Valid Data
160
ns
12
tRD
Read Active Prior to Valid Data
75
ns
13
tDF
Read Data Float Delay
10
ns
–tRC
Reset Active Time[4]
300
ns
Notes:
1. Worst case values occur at an IC junction temperature of 150
°C.
2. For designers who do not need to read from the display, the Read line can be tied to VDD and the Write and Chip Enable lines can be tied together.
3. Changing the logic levels of the Address lines when CE = “0” may cause erroneous data to be entered into the Character RAM, regardless of the
logic levels of the WR and RD lines.
4. The display must not be accessed until after 3 clock pulses (110
µs min. using the internal refresh clock) after the rising edge of the reset line.


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