CPV362M4FPbF

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Vishay Semiconductors

Revision: 10-Jun-15

6

Document Number: 94361

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

Fig. 18b - Test Waveforms of Circuit of Fig. 18a,

Fig. 18c - Test Waveforms of Circuit of Fig. 18a,

Fig. 18d - Test Waveforms of Circuit of Fig. 18a,

Fig. 18e - Macro Waveforms for Figure 18a’s Test Circuit

100

10 000

1000

1000

100

I

F

= 16 A

I

F

= 8.0 A

I

V

T

T

D.U.T.

430 µF

80 %

of V

CE

Same type

device

as

D.U.T.

I

C

V

CE

t1

t2

90 % I

C

10 %

V

CE

t

tf

I

C

5 % I

C

t1 + 5 µs

V

t1

90 % V

GE

+ V

GE

∫

Eoff =

∫

t2

V

t1

5 % V

CE

I

C

I

pk

V

CC

10 %

I

C

Vce

t1

t2

D.U.T. voltage

and current

Gate voltage D.U.T.

+ V

G

10 % + V

G

90 % I

C

tr

t

Eon =

Diode reverse

recovery energy

tx

∫

E

t4

V

t3

t4

t3

Diode recovery

waveforms

I

C

V

pk

10 % V

CC

I

rr

10 % I

rr

V

CC

t

rr

∫

Q

t

rr

I

tx

V

device under test

Current D.U.T.

Voltage in D.U.T.

Current in D1

t0

t1

t2