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FDC37B78X Datasheet(PDF) 59 Page - SMSC Corporation

Part # FDC37B78X
Description  Enhanced Super I/O Controller with ACPI Support, Real Time Clock and Consumer IR
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Manufacturer  SMSC [SMSC Corporation]
Direct Link  http://www.smsc.com
Logo SMSC - SMSC Corporation

FDC37B78X Datasheet(HTML) 59 Page - SMSC Corporation

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59
Read Deleted Data
This command is the same as the Read Data
command, only it operates on sectors that
contain a Deleted Data Address Mark at the
beginning of a Data Field.
TABLE 26 describes the effect of the SK bit on
the Read Deleted Data command execution and
results.
Except where noted in Table 26, the C or R
value of the sector address is automatically
incremented (see Table 27).
TABLE 26 - SKIP BIT VS. READ DELETED DATA COMMAND
DATA ADDRESS
RESULTS
SK BIT
VALUE
MARK TYPE
ENCOUNTERED
SECTOR
READ?
CM BIT OF
ST2 SET?
DESCRIPTION
OF RESULTS
0
0
1
1
Normal Data
Deleted Data
Normal Data
Deleted Data
Yes
Yes
No
Yes
Yes
No
Yes
No
Address not
incremented.
Next sector not
searched for.
Normal
termination.
Normal
termination.
Sector not read
("skipped").
Normal
termination.
Read A Track
This command is similar to the Read Data
command except that the entire data field is
read continuously from each of the sectors of a
track.
Immediately after encountering a pulse
on the nINDEX pin, the FDC starts to read all
data fields on the track as continuous blocks of
data without regard to logical sector numbers. If
the FDC finds an error in the ID or DATA CRC
check bytes, it continues to read data from the
track and sets the appropriate error bits at the
end of the command. The FDC compares the
ID information read from each sector with the
specified value in the command and sets the ND
flag of Status Register 1 to a "1" if there is no
comparison. Multi-track or skip operations are
not allowed with this command. The MT and SK
bits (bits D7 and D5 of the first command byte
respectively) should always be set to "0".
This
command
terminates
when
the
EOT
specified number of sectors has not been read.
If the FDC does not find an ID Address Mark on
the diskette after the second occurrence of a
pulse on the IDX pin, then it sets the IC code in
Status
Register
0
to
"01"
(abnormal
termination), sets the MA bit in Status Register
1 to "1", and terminates the command.


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