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A3977SLP Datasheet(PDF) 6 Page - Allegro MicroSystems |
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A3977SLP Datasheet(HTML) 6 Page - Allegro MicroSystems |
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6 / 18 page  115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 3977 MICROSTEPPING DMOS DRIVER WITH TRANSLATOR 6 Device Operation. The A3977 is a complete microstepping motor driver with built in translator for easy operation with minimal control lines. It is designed to operate bipolar stepper motors in full-, half-, quarter- and eighth-step modes. The current in each of the two output H-bridges, all n-channel DMOS, is regulated with fixed off time pulse-width modulated (PWM) control circuitry. The H-bridge current at each step is set by the value of an external current sense resistor (RS), a reference voltage (VREF), and the DAC’s output voltage controlled by the output of the translator. At power up, or reset, the translator sets the DACs and phase current polarity to initial home state (see figures for home-state conditions), and sets the current regulator for both phases to mixed-decay mode. When a step command signal occurs on the STEP input the translator automati- cally sequences the DACs to the next level (see table 2 for the current level sequence and current polarity). The microstep resolution is set by inputs MS1 and MS2 as shown in table 1. If the new DAC output level is lower than the previous level the decay mode for that H-bridge will be set by the PFD input (fast, slow or mixed decay). If the new DAC level is higher or equal to the previous level then the decay mode for that H-bridge will be slow decay. This automatic current-decay selection will improve microstepping performance by reducing the distortion of the current waveform due to the motor BEMF. Reset Input (RESET). The RESET input (active low) sets the translator to a predefined home state (see figures for home state conditions) and turns off all of the DMOS outputs. The HOME output goes low and all STEP inputs are ignored until the RESET input goes high. Home Output (HOME). The HOME output is a logic output indicator of the initial state of the translator. At power up the translator is reset to the home state (see figures for home state conditions). Step Input (STEP). A low-to-high transition on the STEP input sequences the translator and advances the motor one increment. The translator controls the input to the DACs and the direction of current flow in each wind- ing. The size of the increment is determined by the state of inputs MS1 and MS2 (see table 1). Microstep Select (MS1 and MS2). Input terminals MS1 and MS2 select the microstepping format per table 1. Changes to these inputs do not take effect until the STEP command (see figure). Direction Input (DIR). The state of the DIRECTION input will determine the direction of rotation of the motor. Internal PWM Current Control. Each H-bridge is controlled by a fixed off time PWM current-control circuit that limits the load current to a desired value (ITRIP). Initially, a diagonal pair of source and sink DMOS outputs are enabled and current flows through the motor winding and RS. When the voltage across the current-sense resistor equals the DAC output voltage, the current-sense com- parator resets the PWM latch, which turns off the source driver (slow-decay mode) or the sink and source drivers (fast- or mixed-decay modes). The maximum value of current limiting is set by the selection of RS and the voltage at the VREF input with a transconductance function approximated by: ITRIPmax = VREF/8RS The DAC output reduces the VREF output to the current-sense comparator in precise steps (see table 2 for % ITRIPmax at each step). ITRIP = (% ITRIPmax/100) x ITRIPmax It is critical to ensure that the maximum rating (0.5 V) on the SENSE terminal is not exceeded. For full-step mode, VREF can be applied up to the maximum rating of VDD, because the peak sense value is 0.707 x VREF/8. In all other modes VREF should not exceed 4 V. Functional Description |
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