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IAM-91563-TR1G Datasheet(PDF) 9 Page - AVAGO TECHNOLOGIES LIMITED |
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IAM-91563-TR1G Datasheet(HTML) 9 Page - AVAGO TECHNOLOGIES LIMITED |
9 / 14 page 9 RF IF LO RFC Bypass Capacitor Vd IF Output Figure 26. Available Conversion Gain and SSB Noise Figure vs. Device Current (Source Resistor). The DC bias is also applied to the mixer through the IF port. Figure 5 shows how an inductor (RFC) is used to isolate the IF from the DC supply. The bias line is bypassed to ground with a capacitor to keep RF off of the DC supply lines and to prevent dips or peaks in the response of the mixer. Figure 25. Bias Connection. LO Port The LO input port is internally matched to 50 Ω within a .: VSWR over the entire operating frequency range. Ad- ditional matching will normally not be needed. However, if desired, a small series inductor can be used to provide some improvement in the LO match and thus reduce the LO drive level requirement by up to 0.7 dB. Reflection co- efficients for the LO port are shown in the table of Typical Reflection Coefficients. Source Bypass Pin The Source Bypass pin should be RF bypassed to ground at both the RF and LO frequencies as well as the IF. Many capacitors with values large enough to adequately bypass lower intermediate frequencies contain parasitics that may have resonances in the RF band. It is often practical to use two capacitors in parallel for this purpose instead of one. A small value, high quality capacitor is used to by- pass the RF/LO frequencies and a large value capacitor for the IF. When biased in the high linearity mode, a resistor is added from the Source Bypass pin to ground. High Linearity Mode The IAM-9563 has a feature that allows the user to place an external resistor from the Source Bypass pin to ground and increase the device current from a nominal 9 mA to as high as 0 mA. The additional current increases mixer linearity (IP 3) and output power(PdB). Mixer performance at higher device current is shown in Figures 6 and 7. Figure 27. One dB Compression and Input Third Order Intercept Point vs. De- vice Current (Resistor). As an example of improved linearity, the use of a 5 Ω re- sistor at the Source Bypass pin increases the device cur- rent to 4 mA. At .9 GHz, the input IP 3 is increased from -6.5 dBm to -3 dBm. Increasing the LO drive level from -5 dBm to - dBm further increases the input IP 3 to 0 dBm. 7 13 15 17 9 11 19 4 6 8 10 14 12 DEVICE CURRENT (mA) Figure 26. Available Conversion Gain and SSB Noise Figure vs. Device Current (Source Resisitor). 1000 9 5 3 56 21 Approximate Resistor Value ( ) NF GAIN 7 13 15 17 9 11 19 1000 9 5 3 56 21 -10 -8 -6 -4 0 -2 DEVICE CURRENT (mA) Approximate Resistor Value ( ) Figure 27. One dB Compression and Input Third Order Intercept Point vs. Device Current (Resistor). IP3 P1 dB |
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