MR16R0828BN1-CG6 datasheet(2/4 Pages) SAMSUNG

Part #	MR16R0828BN1-CG6

Description	RAMBUS MODULE

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Manufacturer	SAMSUNG [Samsung semiconductor]

Direct Link	http://www.samsung.com/Products/Semiconductor

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SERIAL PRESENCE DETECT

MR16R0824(6/8/C/G)BN1

- 2 -

RAMBUS MODULE

Version 1.1 Oct. 2000

• Contents ;

Byte #

(Dec)

Described Function

Option

Field

Width

Units

Supported Function

Hex Value

Note

K8

K7

G6

K8

K7

G6

0

SPD Revision Level

8

LUT

SPD Revision 1.0

02h

1

Total Number of Bytes in the SPD

8

LUT

256 Bytes

08h

1

2

Device Type

8

LUT

Direct RDRAM

01h

1

3

Module Type

8

LUT

RIMM Module

01h

1

4

Row Address Bits[3:0], Column Address Bits[3:0]

4,4

bits

9 bits, 6 bits

96h

5

Bank Address Bits and Type

8

LUT

32s banks

C5h

1

6

Refresh Bank Bits

3

bits

32 Refresh Bank Sets

05h

7

Refresh Period(=tREF)

8

ms

32ms

20h

8

Protocol Version

8

LUT

Protocol Version 1

02h

1

9

Misc. Device Configuration Field

8

n/a

DQS=1.5, no -LP, S28, S3

05h

3

10

Minimum Precharge to RAS time(=tRP-R,Min )

5

1/fRAS

8cycles

08h

11

Minimum RAS to Precharge time(=tRAS-R,Min)

6

1/fRAS

20cycles

14h

12

Minimum RAS to CAS time(=tRCD-R,Min)

5

1/fRAS

10cycles

8cycles

0Ah

08h

13

Minimum RAS to RAS time(=tRR-R,Min)

5

1/fRAS

8cycles

08h

14

Minimum Precharge to Precharge time(=tPP-R,Min)

5

1/fRAS

8cycles

08h

15

Min tCYCLE for Range A

8

128ps

2.50ns

2.80ns

3.33ns

13h

15h

1Ah

16

Max tCYCLE for Range A

8

128ps

3.83ns

1Eh

17

tCDLY Range for Range A

8

tCYCLE

5tCYCLE

~ 9tCYCLE

5tCYCLE

~ 9tCYCLE

5tCYCLE

~ 9tCYCLE

59h

18

tCLS and tCAS Range for Range A

8

tCYCLE

2tCYCLE for tCLS & tCAS

AAh

19

Min tCYCLE for Range B

8

128ps

RFU

00h

2

20

Max tCYCLE for Range B

8

128ps

RFU

00h

2

21

tCDLY Range for Range B

8

tCYCLE

RFU

00h

2

22

tCLS and tCAS Range for Range B

8

tCYCLE

RFU

00h

2

23

Min tCYCLE for Range C

8

128ps

RFU

00h

2

24

Max tCYCLE for Range C

8

128ps

RFU

00h

2

25

tCDLY Range for Range C

8

tCYCLE

RFU

00h

2

26

tCLS and tCAS Range for Range C

8

tCYCLE

RFU

00h

2

27

Min tCYCLE for Range D

8

128ps

RFU

00h

2

28

Max tCYCLE for Range D

8

128ps

RFU

00h

2

29

tCDLY Range for Range D

8

tCYCLE

RFU

00h

2

30

tCLS and tCAS Range for Range D

8

tCYCLE

RFU

00h

2

31

Power Down Exit Max.time, Phase A(=tPDNXA,Max)

8

us

4us

04h

32

Power Down Exit Max.time, Phase B(=tPDNXB,Max)

8

64tCYCLE

9000tCYCLE

8Dh

33

Nap Exit Max.time, Phase A(=tNAPXA,Max)

8

ns

50ns

32h

34

Nap Exit Max.time, Phase B(=tNAPXB,Max)

8

ns

40ns

28h

35

fIMIN[11:8]

fIMAX[11:8]

4

MHz

261MHz

400MHz

261MHz

357MHz

261MHz

300MHz

11h

36

fIMIN[7:0]

8

MHz

261MHz

05h

37

fIMAX[7:0]

8

MHz

400MHz

357MHz

300MHz

90h

65h

2Ch

38

ODF mapping

-

00h

1

MR16R082C(G)BN1-CK8/CK7/CG6

• Feature : Double Sided Module & 1,250 mil height

• Composition : 8Mx16 *12(16)pcs

• Used component type & part number

Normal Package (K4R271669B-NCK8/NCK7/NCG6)

Mirrored Package (K4R271669B-MCK8/MCK7/MCG6)

• # of banks in component :32s banks (Doubled with Split Banks)

• Refresh : 16K/32ms

MR16R0824(6/8)BN1-CK8/CK7/CG6

• Feature : Single Sided Module & 1,250 mil height

• Composition : 8Mx16 *4(6/8)pcs

• Used component type & part number

Normal Package (K4R271669B-NCK8/NCK7/NCG6)

• # of banks in component : 32s banks (Doubled with Split Banks)

• Refresh : 16K/32ms

1

2

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