PRODUCT DATASHEET

PART NUMBER

DFTO

DATE

REVISION

SHEET NO

SFPT-BD35-01

ELLA

15 Sep., 2014

P1

8

OF

10

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address 1010000X (A0h). The digital diagnostic monitoring interface makes use of the 8 bit address 1010001X (A2h),

so the originally defined serial ID memory map remains unchanged. The interface is identical to, and is thus fully

backward compatible with both the GBIC Specification and the SFP Multi Source Agreement.

The operating and diagnostics information is monitored and reported by a Digital Diagnostics Transceiver Controller

(DDTC) inside the transceiver, which is accessed through a 2-wire serial interface. When the serial protocol is activated,

the serial clock signal (SCL, Mod Def 1) is generated by the host. The positive edge clocks data into the SFP

transceiver into those segments of the E2PROM that are not write-protected. The negative edge clocks data from the

SFP transceiver. The serial data signal (SDA, Mod Def 2) is bi-directional for serial data transfer. The host uses SDA in

conjunction with SCL to mark the start and end of serial protocol activation. The memories are organized as a series of

8-bit data words that can be addressed individually or sequentially.

Digital diagnostics for the SFPT-BD35-01 are internally calibrated by default.