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3 page 
www.ti.com RECOMMENDED OPERATING CONDITIONS ELECTRICAL CHARACTERISTICS TPS65013 SLVS517 – AUGUST 2004 MIN NOM MAX UNIT V(AC) Supply voltage from ac adapter 4.5 5.5 V V(USB) Supply voltage from USB 4.4 5.25 V V(BAT) Voltage at charger output/battery 2.5 4.2 V VI(MAIN),VI(CORE),VCC Input voltage range step-down converters 2.5 6.0 V VI(LDO1), VI(LDO2) Input voltage range for LDOs 1.8 6.5 V TA Operating ambient temperature -40 85 °C TJ Operating junction temperature -40 125 °C Resistor from VI(main),VI(core) to VCC used for R(CC) 10 100 Ω filtering, CI(VCC) = 1 µF V I(MAIN) = VI(CORE) = VCC = VI(LDO1) = VI(LDO2) = 3.6 V, TA = -40°C to 85°C, typical values are at TA = 25°C battery charger specifications are valid in the range 0 °C < T A < 85°C unless otherwise noted PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Control Signals: LOW_PWR, SCLK, SDAT (Input) VIH High-level input voltage IIH = 20 µA (1) 1.2 VCC V VIL Low-level input voltage IIL = 10 µA 0 0.4 V IIB Input bias current 0.01 1.0 µA Control Signals: PB_ONOFF, HOT_RESET, BATT_COVER VIH High-level input voltage IIH = 20 µA (1) 0.8 VCC 6 V VIL Low-level input voltage IIL = 10 µA 0 0.4 V R(pb_onoff) Pulldown resistor at PB_ONOFF 1000 k Ω R(hot_reset) Pullup resistor at HOT_RESET, 1000 k Ω connected to VCC R(batt_cover) Pulldown resistor at BATT_COVER 2000 k Ω t(glitch) De-glitch time at all 3 pins 38 56 77 ms t(batt_cover) Delay after t(glitch) (PWRFAIL goes low) 1.68 2.4 3.2 ms before supplies are disabled when BATT_COVER goes low. CONTROL SIGNALS: MPU_RESET, PWRFAIL, RESPWRON, INT, SDAT (output) VOH High-level output voltage 6 V VOL Low-level output voltage IIL = 10 mA 0 0.3 V td(mpu_nreset) Duration of low pulse at MPU_RESET 100 µs td(nrespwron) Duration of low pulse at RESPWRON TPOR = 0 80 100 120 ms after VMAIN is in regulation TPOR = 1 800 1000 1200 td(uvlo) Time between UVLO going active 1.68 2.4 3.2 ms (PWRFAIL going low) and supplies be- ing disabled td(overtemp) Time between chip overtemperature 1.68 2.4 3.2 ms condition being recognized (PWRFAIL going low) and supplies being disabled SUPPLY PIN: VCC I(Q) Operating quiescent current VI = 3.6 V, current into Main + Core + VCC 70 µA IO(SD) Shutdown supply current VI = 3.6 V, BATT_COVER = GND, 15 25 µA current into Main + Core + VCC VMAIN STEP-DOWN CONVERTER VI Input voltage range 2.5 6.0 V IO Maximum output current 1000 mA IO(SD) Shutdown supply current BATT_COVER = GND 0.1 1 µA rDS(on) P-channel MOSFET on-resistance VI(MAIN) = VGS = 3.6 V 110 210 m Ω Ilkg(p) P-channel leakage current V(DS) = 6 V 1 µA (1) If the input voltage is higher than VCC, an additional input current, limited by an internal 10-kΩ resister, flows. 3 |
