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ICS309RT Datasheet(PDF) 3 Page - Integrated Circuit Systems

Part # ICS309RT
Description  SERIAL PROGRAMMABLE TRIPLE PLL SS VERSACLOCK SYNTHESIZER
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Manufacturer  ICST [Integrated Circuit Systems]
Direct Link  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS309RT Datasheet(HTML) 3 Page - Integrated Circuit Systems

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SERIAL PROGRAMMABLE TRIPLE PLL SS VERSACLOCK SYNTHESIZER
MDS 309 G
3
Revision 122704
In te gr ated Circuit Systems 525 Ra ce Street, San Jose, CA 9512 6 tel (4 08) 297 -1 201 www.icst.com
ICS309
Configuring the ICS309
Initial State: The ICS309 may be configured to have up to 9 frequency outputs, utilizing the 4 on-board
PLLs and spread spectrum circuitry. Unprogrammed, the part has the following outputs, related to the
reference input clock:
The STROBE pin must have an external 250 kOhm pull-up resistor to acheive the Initial State.
The input crystal range for the ICS309 is 5 MHz to 27 MHz.
The ICS309 can be programmed to set the output functions and frequencies. 160 data bits generated by
the VersaClockTM software are written in DATA pin in this order: MSB (left most bit) first.
As show in Figure 2, after these 160 bits are clocked into the ICS309, taking STROBE high will send this
data to the internal latch and the CLK output will lock within 10 ms.
Note: STROBE utilizes a transparent latch that is latched when in the high state. If STROBE is in the high
state and SCLK is pulsed, DATA is clocked directly to the internal latch and the output conditions will
change accordingly. Although this will not damage the ICS309, it is recommended that STROBE be kept
low while DATA is being clocked into the ICS309 in order to avoid unintended changes on the output clocks.
All outputs may be turned off during initialization by bringing the PDTS pin to Ground. When PDTS is
brought high, after the Strobe pin in brought high, the programmed output frequencies will be available.
AC Parameters for Writing to the ICS309
Default Outputs
Output
Frequency
Clocks 1 - 9 (Pins 4, 7-14)
Reference Output
Parameter
Condition
Min.
Max.
Units
tSETUP
Setup time
10
ns
tHOLD
Hold time after SCLK
10
ns
tW
Data wait time
10
ns
tS
Strobe pulse width
40
ns
SCLK Frequency
30
MHz
DATA
t
hold
t
setup
SCLK
STROBE
t
s
t
w
Figure 2. Tim ing D iagram for Program m ing the IC S309
Bit160
Bit2
Bit1
Bit3
Bit159
Bit158


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