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SN74AVCA406 Datasheet(PDF) 4 Page - Texas Instruments

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Part # SN74AVCA406
Description  MMC SD CARD MEMORY STICK SMARTMEDIA AND XD PICTURE CARD 15KV ESD PROTECTED VOLTAGE TRANSLATION TRANSCEIVER
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

SN74AVCA406 Datasheet(HTML) 4 Page - Texas Instruments

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SN74AVCA406
MMC, SD CARD, Memory StickE, SmartMedia, AND xDPicture CardE
+15kV ESDPROTECTED VOLTAGETRANSLATION TRANSCEIVER
SCES615B – OCTOBER 2004 – REVISED DECEMBER 2004
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Table 2. SD or SDIO Card
PIN
NO.
PIN
NAME
SIGNAL NAME
OR
(CONNECTION)
PIN FUNCTION
PIN
TYPE
A1
VCCA
VCCA
A-port supply voltage. VCCA powers all A-port I/Os and control inputs.
Power
B1
10A1
CLK.h
Clock signal from host
Input
C1
9A
CMD.h
Command signal connected to host
I/O
D1
9DIR
CMD-dir.h
Direction control for 9A/9B connected to host
Input
E1
78DIR
(tie-high)
Direction control for 7A/7B and 8A/8B. Not used in this mode. Tie to VCCA.
Input
F1
7A
(tie-low)
I/O pin not used in this mode. Tie to GND.
I/O
G1
VCCA
VCCA
A-port supply voltage. VCCA powers all A-port I/Os and control inputs.
Power
A2
2A
DAT1.h
Data bit 2 connected to host. Referenced to VCCA.
I/O
B2
3A
DAT2.h
Data bit 3 connected to host. Referenced to VCCA.
I/O
C2
10A2
CLK-f.h
Clock feedback to host for resynchronizing data. Used in OMAP processors. Optional on
other processors. Leave unconnected if not used.
Output
D2
4A
DAT3.h
Data bit 4 connected to host. Referenced to VCCA.
I/O
E2
6A
(tie-low)
I/O pin not used in this mode. Tie to GND.
I/O
F2
8A
(tie-low)
I/O pin not used in this mode. Tie to GND.
I/O
G2
5A
(tie-low)
I/O pin not used in this mode. Tie to GND.
I/O
A3
4DIR
DAT3-dir.h
Direction control for 4A/4B
Input
B3
1A
DAT0.h
Data bit 1 connected to host. Referenced to VCCA.
I/O
C3
Depopulated ball
D3
56DIR
(tie-high)
Direction control for 5A/5B and 6A/6B. Not used in this mode. Tie to VCCA.
Input
E3
GND
GND
Ground
F3
12A
DNU
Output pin not used in this mode. Do not use. Leave unconnected.
Output
G3
11A
(tie-low)
Input pin not used in this mode. Tie to GND.
Input
A4
2DIR
DAT1-dir.h
Direction control for 2A/2B connected to host
Input
B4
1DIR
DAT0-dir.h
Direction control for 1A/1B connected to host
Input
C4
3DIR
DAT2-dir.h
Direction control for 3A/3B connected to host
Input
D4
GND
GND
Ground
E4
CS0
CS0.h
Card select from host. Active low. When CS0/ = high, 1A, 2A, 3A, 4A, 1B, 2B, 3B, 4B, 9A,
9B1, and 10A2 are placed in Hi Z and 10B1 is low.
Input
F4
13A
(tie-low)
Input pin not used in this mode. Tie to GND.
Input
G4
CS1
(tie-high)
Card select. Not used in this mode. Tie to VCCA for proper operation.
Input
A5
MODE1
(tie-low)
MODE1, MODE0 determine mode of operation (see Table 1). Tie to GND in this mode.
Input
B5
MODE0
(tie-low)
MODE1, MODE0 determine mode of operation (see Table 1). Tie to GND in this mode.
Input
C5
GND
GND
Ground
D5
4B
DAT3
Data bit 4 connected to card. Referenced to VCCB0.
I/O
E5
GND
GND
Ground
F5
7B
DNU
I/O pin not used in this mode. Leave unconnected.
I/O
G5
8B
DNU
I/O pin not used in this mode. Leave unconnected.
I/O
A6
10B1
CLK
Clock signal connected to card
Output
B6
9B1
CMD
Command signal connected to card
Output
C6
2B
DAT1
Data bit 2 connected to card. Referenced to VCCB0.
I/O


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