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MB85RC64PNF-G-JNE1 Datasheet(PDF) 4 Page - Fujitsu Component Limited. |
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MB85RC64PNF-G-JNE1 Datasheet(HTML) 4 Page - Fujitsu Component Limited. |
4 / 20 page MB85RC64 4 DS05–13109–3E ■ I2C COMMUNICATION PROTOCOL The I2C bus is a two wire serial interface that uses a bidirectional data bus (SDA) and serial clock (SCL). A data transfer can only be initiated by the bus master, which will also provide the serial clock for synchroni- zation. The SDA signal should change while SCL is Low. However, as an exception, when starting and stopping communication sequence, SDA is allowed to change while SCL is High. • Start Condition To start read or write operations by the I2C bus, set the SDA input from High to Low while the SCL input is in High in order to start reading and writing. • Stop Condition Set the SDA input from Low to High while the SCL input is in High in order to terminate the I2C bus commu- nication. Because the MB85RC64 does not need the writing wait time unlike E2PROM, it goes to the standby state immediately after the stop condition input. • Start Condition, Stop Condition Note : The FRAM device does not need the programming wait time like tWC after issuing the Stop Condition such as. SCL SDA Start Stop |
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