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LMC6024 Datasheet(PDF) 4 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
Part No. LMC6024
Description  Low Power CMOS Quad Operational Amplifier
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Maker  NSC [National Semiconductor (TI)]
Homepage  http://www.national.com
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 4 page
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AC Electrical Characteristics
The following specifications apply for V
+ = 5V, V= 0V, V
CM = 1.5V, VO = 2.5V, and RL = 1M unless otherwise noted. Bold-
face limits apply at the temperature extremes; all other limits T
J = 25˚C.
Typical
LMC6024I
Symbol
Parameter
Conditions
(Note 5)
Limit
Units
(Note 6)
SR
Slew Rate
(Note 8)
0.11
0.05
V/µs
0.03
Min
GBW
Gain-Bandwidth Product
0.35
MHz
θ
M
Phase Margin
50
Deg
G
M
Gain Margin
17
dB
Amp-to-Amp Isolation
(Note 9)
130
dB
e
n
Input-Referred Voltage Noise
F = 1 kHz
42
i
n
Input-Referred Current Noise
F = 1 kHz
0.0002
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings indicate conditions for which the device
is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics.
The guaranteed specifications apply only for the test conditions listed.
Note 2: Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature and/or multiple Op Amp shorts
can result in exceeding the maximum allowed junction temperature of 150˚C. Output currents in excess of ±30 mA over long term may adversly affect reliability.
Note 3: The maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(max)
−TA)/θJA.
Note 4: Human body model, 100 pF discharge through a 1.5 k
Ω resistor.
Note 5: Typical values represent the most likely parametric norm.
Note 6: All limits are guaranteed by testing or correlation.
Note 7: V+ = 15V, VCM = 7.5V, and RL connected to 7.5V. For Sourcing tests, 7.5V ≤ VO ≤ 11.5V. For Sinking tests, 2.5V ≤ VO ≤ 7.5V.
Note 8: V+ = 15V. Connected as Voltage Follower with 10V step input. Number specified is the slower of the positive and negative slew rates.
Note 9: Input referred, V+ = 15V and RL = 100 kΩ connected to 7.5V. Each amp excited in turn with 1 kHz to produce VO = 13 VPP.
Note 10: For operating at elevated temperatures the device must be derated based on the thermal resistance
θJA with PD = (TJ −TA)/θJA.
Note 11: All numbers apply for packages soldered directly into a PC board.
Note 12: Do not connect output to V+ when V+ is greater than 13V or reliability may be adversely affected.
www.national.com
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