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AM29LV800B-100 Datasheet(PDF) 2 Page - Advanced Micro Devices

Part # AM29LV800B-100
Description  8 Megabit (1,048,576 x 8-Bit/524,288 x 16-Bit) CMOS 3.0 Volt-only, Sectored Flash Memory
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Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM29LV800B-100 Datasheet(HTML) 2 Page - Advanced Micro Devices

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Am29LV800T/Am29LV800B
PRELIMINARY
GENERAL DESCRIPTION
The Am29LV800 is an 8 Mbit, 3.0 Volt-only Flash mem-
ory organized as 1 Mbyte of 8 bits each or 512K words
of 16 bits each. For flexible erase and program capabil-
ity, the 8 Mbits of data is divided into 19 sectors of one
16 Kbyte, two 8 Kbyte, one 32 Kbyte, and fifteen 64
Kbytes. The x8 data appears on DQ0–DQ7; the x16
data appears on DQ0–DQ15. The Am29LV800 is of-
fered in 44-pin SO and 48-pin TSOP packages. This
device is designed to be programmed in-system with
the standard system 3.0 Volt VCC supply. The device
can also be reprogrammed in standard EPROM
programmers.
The Am29LV800 provides two levels of performance.
The first level offers access times as fast as 100 ns with
a VCC range as low as 2.7 volts, which is optimal for
battery powered applications. The second level offers a
90 ns access time, optimizing performance in systems
where the power supply is in the regulated range of 3.0
to 3.6 volts. To eliminate bus contention, the device has
separate chip enable (CE), write enable (WE), and
output enable (OE) controls.
The Am29LV800 is entirely command set compatible
with the JEDEC single-power-supply Flash standard.
Commands are written to the command register using
standard microprocessor write timings. Register con-
tents serve as input to an internal state-machine which
controls the erase and programming circuitry. Write cy-
cles also internally latch addresses and data needed
for the programming and erase operations. Reading
data out of the device is similar to reading from other
Flash or EPROM devices.
The Am29LV800 is programmed by executing the pro-
gram command sequence. This will invoke the Embed-
ded Program Algorithm which is an internal algorithm
that automatically times the program pulse widths and
verifies proper cell margin. Erase is accomplished by
executing the erase command sequence. This will in-
voke the Embedded Erase Algorithm which is an inter-
nal algorithm that automatically pre-programs the array
if it is not already programmed before executing the
erase operation. During erase, the device automatically
times the erase pulse widths and verifies proper cell
margin.
This device also features a sector erase architecture.
This allows for sectors of memory to be erased and re-
programmed without affecting the data contents of
other sectors. A sector is typically erased and verified
within 1.0 second. The Am29LV800 is fully erased
when shipped from the factory.
The Am29LV800 device also features hardware sector
protection. This feature will disable both program and
erase operations in any combination of nineteen sec-
tors of memory.
AMD has implemented an Erase Suspend feature that
enables the user to put erase on hold for any period of
time to read data from or program data to a sector that
was not being erased. Thus, true background erase
can be achieved.
The device features single 3.0 Volt power supply oper-
ation for both read and write functions. Internally gen-
erated and regulated voltages are provided for the
program and erase operations. A low VCC detector au-
tomatically inhibits write operations during power tran-
sitions. The end of program or erase is detected by the
RY/BY pin. Data Polling of DQ7, or by the Toggle Bit
(DQ6). Once the end of a program or erase cycle has
been completed, the device automatically resets to the
read mode.
The Am29LV800 also has a hardware RESET pin.
When this pin is driven low, execution of any Embed-
ded Program Algorithm or Embedded Erase Algorithm
will be terminated. The internal state machine will then
be reset into the read mode. The RESET pin may be
tied to the system reset circuitry. Therefore, if a system
reset occurs during the Embedded Program Algorithm
or Embedded Erase Algorithm, the device will be auto-
matically reset to the read mode and will have errone-
ous data stored in the address locations being
operated on. These locations will need rewriting after
the Reset. Resetting the device will enable the sys-
tem’s microprocessor to read the boot-up firmware
from the Flash memory.
AMD’s Flash technology combines years of Flash
memory manufacturing experience to produce the
highest levels of quality, reliability and cost effective-
ness. The Am29LV800 memory electrically erases
all bits within a sector simultaneously via Fowler-
Nordhiem tunneling. The bytes/words are programmed
one byte/word at a time using the EPROM program-
ming mechanism of hot electron injection.


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