Philips Semiconductors

PCF8594C-2

512

Product data

Rev. 05 — 25 October 2004

5 of 21

9397 750 14221

© Koninklijke Philips Electronics N.V. 2004. All rights reserved.

7.

Device addressing

[1]

The Most Significant Bit (MSB) ‘b7’ is sent first.

A2 and A1 are hardware selectable pins and A0 is software selectable pin.

equivalent to a 16 kbit EEPROM or 4 devices of 512 bytes of memory.

A0 selects the lower (logic level ‘0’) or the higher (logic level ‘1’) 256-byte page on the

selected device. The device is selected by bits A2 and A1. Figure 3 shows the various

address and page combinations.

Table 5:

Device address code

Selection

Device code

Chip Enable

R/W

Bit

b7[1]

b6

b5

b4

b3

b2

b1

b0

Device

1

0

1

0

A2

A1

A0

R/W

Fig 3.

Device addressing.

002aaa260

HIGHER 256-BYTE PAGE

PCF8594C-2

DEVICE 1

LOWER 256-BYTE PAGE

HIGHER 256-BYTE PAGE

PCF8594C-2

DEVICE 2

LOWER 256-BYTE PAGE

HIGHER 256-BYTE PAGE

PCF8594C-2

DEVICE 3

LOWER 256-BYTE PAGE

HIGHER 256-BYTE PAGE

PCF8594C-2

DEVICE 4

LOWER 256-BYTE PAGE

A2

0

0

0

0

1

1

1

1

A1

0

0

1

1

0

0

1

1

A0

1

0

1

0

1

0

1

0