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PC33887VW Datasheet(PDF) 5 Page - Motorola, Inc |
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PC33887VW Datasheet(HTML) 5 Page - Motorola, Inc |
5 / 28 page MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA 33887 5 PGND NC V+ V+ V+ V+ NC NC NC NC CCP D1 IN2 EN NC NC NC OUT2 OUT2 OUT2 OUT2 NC NC D2 PGND PGND PGND PGND NC V+ V+ V+ V+ NC NC NC NC IN1 FS AGND NC NC NC NC OUT1 OUT1 OUT1 OUT1 NC NC FB PGND PGND PGND 54 40 .35 34 33 32 31 30 29 28 39 38 37 36 47 46 45 44 43 42 41 51 50 49 48 53 52 1 15 20 21 22 23 24 25 26 27 16 17 18 19 8 9 10 11 12 13 14 4 5 6 7 2 3 Transparent Top View of Package SOICW-EP TERMINAL DEFINITIONS A functional description of each terminal can be found in the System/Application Information section, page 19. Terminal Terminal Name Formal Name Definition 1–4, 51–54 PGND Power Ground High-current power ground. 5–7, 9, 14, 19–22, 27– 29, 33–36, 41, 46, 48–50 NC No Connect No internal connection to this terminal. 8 D2 Disable 2 Active LOW input used to simultaneously tri-state disable both H-Bridge outputs. When D2 is Logic LOW, both outputs are tri-stated. 10–13 OUT2 H-Bridge Output 2 Output 2 of H-Bridge. 15 –18, 37–40 V+ Positive Power Supply Positive supply connections. 23 CCP Charge Pump Capacitor External reservoir capacitor connection for internal charge pump capacitor. 24 D1 Disable 1 Active HIGH input used to simultaneously tri-state disable both H-Bridge outputs. When D1 is Logic HIGH, both outputs are tri-stated. 25 IN2 Logic Input Control 2 Logic input control of OUT2 (i.e., IN2 logic HIGH = OUT2 HIGH). 26 EN Enable Logic input Enable control of device (i.e., EN logic HIGH = full operation, EN logic LOW = Sleep Mode). 30 AGND Analog Ground Low-current analog signal ground. 31 FS Fault Status for H-Bridge Open drain active LOW Fault Status output requiring a pullup resistor to 5.0 V. 32 IN1 Logic Input Control 1 Logic input control of OUT1 (i.e., IN1 logic HIGH = OUT1 HIGH). 42–45 OUT1 H-Bridge Output 1 Output 1 of H-Bridge. 47 FB Feedback for H-Bridge Current feedback output providing ground referenced 1/375th ratio of H-Bridge high-side current. Pad Thermal Interface Exposed Pad Thermal Interface Exposed pad thermal interface for sinking heat from the device. Note Must be DC-coupled to analog ground and power ground via very low impedance path to prevent injection of spurious signals into IC substrate. Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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