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MB90F546GSPFV Datasheet(PDF) 10 Page - Fujitsu Component Limited. |
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MB90F546GSPFV Datasheet(HTML) 10 Page - Fujitsu Component Limited. |
10 / 67 page MB90540/540G/545/545G Series 10 (Continued) Pin No. Pin name Circuit type Function LQFP*2 QFP*1 11 13 P33 I General I/O port with programmable pullup. This function is enabled in the single-chip mode, external bus 8-bit mode or when WRH pin output is disabled. WRH Write strobe output pin for the 8 higher bits of the data bus. This function is enabled when the external bus is enabled, when the external bus 16-bit mode is selected, and when the WRH output pin is enabled. 12 14 P34 I General I/O port with programmable pullup. This function is enabled in the single-chip mode or when the hold function is disabled. HRQ Hold request input pin. This function is enabled when both the external bus and the hold functions are enabled. 13 15 P35 I General I/O port with programmable pullup. This function is enabled in the single-chip mode or when the hold function is disabled. HAK Hold acknowledge output pin. This function is enabled when both the external bus and the hold functions are enabled. 14 16 P36 I General I/O port with programmable pullup. This function is enabled in the single-chip mode or when the external ready function is disabled. RDY Ready input pin. This function is enabled when both the external bus and the external ready functions are enabled. 15 17 P37 H General I/O port with programmable pullup. This function is enabled in the single-chip mode or when the CLK output is dis- abled. CLK CLK output pin. This function is enabled when both the external bus and CLK outputs are enabled. 16 18 P40 G General I/O port. This function is enabled when UART0 disables the serial data output. SOT0 Serial data output pin for UART0. This function is enabled when UART0 enables the serial data output. 17 19 P41 G General I/O port. This function is enabled when UART0 disables serial clock output. SCK0 Serial clock I/O pin for UART0. This function is enabled when UART0 enables the serial clock output. 18 20 P42 G General I/O port. This function is always enabled. SIN0 Serial data input pin for UART0. Set the corresponding Port Direction Register to input if this function is used. 19 21 P43 G General I/O port. This function is always enabled. SIN1 Serial data input pin for UART1. Set the corresponding Port Direction Register to input if this function is used. |
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