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ICS341MLF Datasheet(PDF) 1 Page - Integrated Circuit Systems |
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ICS341MLF Datasheet(HTML) 1 Page - Integrated Circuit Systems |
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1 / 7 page  ICS341 MDS 341 E 1 Revision 090704 Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com Field Programmable SS VersaClock Synthesizer Description The ICS341 is a low cost, single-output, field programmable clock synthesizer. The ICS341 can generate an output frequency from 250 kHz to 200 MHz and may employ Spread Spectrum techniques to reduce system electro-magnetic interference (EMI). Using ICS’ VersaClock™software to configure the PLL and output, the ICS341 contains a One-Time Programmable (OTP) ROM to allow field programmability. Programming features include 4 selectable configuration registers. The device employs Phase-Locked Loop (PLL) techniques to run from a standard fundamental mode, inexpensive crystal, or clock. It can replace multiple crystals and oscillators, saving board space and cost. The device also has a power-down feature that tri-states the clock outputs and turns off the PLLs when the PDTS pin is taken low. The ICS341 is also available in factory programmed custom versions for high-volume applications. Features • 8-pin SOIC package • Highly accurate frequency generation • M/N Multiplier PLL: M = 1...2048, N = 1...1024 • Output clock frequencies up to 200 MHz • Four ROM locations for frequency and spread selection • Spread spectrum capability for lower system EMI • Center or Down Spread up to 4% total • Selectable 32 kHz or 120 kHz modulation • Input crystal frequency from 5 to 27 MHz • Input clock frequency from 2 to 50 MHz • Operating voltage of 3.3 V • Advanced, low-power CMOS process • For two output clocks, use the ICS342. For three output clocks, see the ICS343. For more than three outputs, see the ICS345 or ICS348. • Available in Pb (lead) free packaging Block Diagram Crystal Oscillator PLL Clock Synthesis, Spred Spectrum and Control Circuitry CLK PDTS (output and PLL) OTP ROM with PLL Divider Values S1:0 2 VDD GND X2 Crystal or clock input External capacitors are required with a crystal input. X1/ICLK |
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