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HS1-82C37ARH-Q Datasheet(PDF) 1 Page - Harris Corporation |
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HS1-82C37ARH-Q Datasheet(HTML) 1 Page - Harris Corporation |
1 / 28 page CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper I.C. Handling Procedures. Copyright © Harris Corporation 1995 1 SEMICONDUCT OR HS-82C37ARH Radiation Hardened CMOS High Performance Programmable DMA Controller Description The Harris HS-82C37ARH is an enhanced, radiation hardened CMOS version of the industry standard 8237A Direct Memory Access (DMA) controller, fabricated using the Harris hardened field, self-aligned silicon gate CMOS process. The HS-82C37ARH offers increased functionality, improved performance, and dramatically reduced power consumption for the radiation environment. The high speed, radiation hardness, and industry standard configuration of the HS-82C37ARH make it compatible with radiation hardened microprocessors such as the HS-80C85RH and the HS-80C86RH. The HS-82C37ARH can improve system performance by allowing external devices to transfer data directly to or from system memory. Memory-to-memory transfer capability is also provided, along with a memory block initialization feature. DMA requests may be generated by either hardware or software, and each channel is independently programmable with a variety of features for flexible operation. Static CMOS circuit design insures low operating power and allows gated clock operation for an even further reduction of power. Multimode programmability allows the user to select from three basic types of DMA services, and reconfiguration under program control is possible even with the clock to the controller stopped. Each channel has a full 64K address and word count range, and may be programmed to autoinitialize these registers following DMA termination (end of process). The Harris hardened field CMOS process results in performance equal to or greater than existing radiation resis- tant products at a fraction of the power. Features • Radiation Hardened - Total Dose >105 RAD (Si) - Transient Upset > 108 RAD (Si)/s - Latch Up Free EPI-CMOS • Low Power Consumption - IDDSB = 50 µA Maximum - IDDOP = 4.0mA/MHz Maximum • Pin Compatible with NMOS 8237A and the Harris 82C37A • High Speed Data Transfers Up To 2.5 MBPS With 5MHz Clock • Four Independent Maskable Channels With Autoinitializa- tion Capability • Expandable to Any Number of Channels • Memory-to-Memory Transfer Capability • CMOS Compatible • Hardened Field, Self-Aligned, Junction Isolated CMOS Process • Single 5V Supply • Military Temperature Range -55oC to +125oC August 1995 Spec Number 518058 File Number 3042.1 Ordering Information PART NUMBER TEMPERATURE RANGE PACKAGE HS1-82C37ARH-Q -55oC to +125oC 40 Lead SBDIP HS1-82C37ARH-8 -55oC to +125oC 40 Lead SBDIP HS1-82C37ARH-Sample +25oC 40 Lead SBDIP HS9-82C37ARH-Q -55oC to +125oC 42 Lead Ceramic Flatpack HS9-82C37ARH-8 -55oC to +125oC 42 Lead Ceramic Flatpack HS9-82C37ARH/Sample +25oC 42 Lead Ceramic Flatpack |
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