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82C37 Datasheet(PDF) 1 Page - Harris Corporation

Part No. 82C37
Description  CMOS High Performance Programmable DMA Controller
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Maker  HARRIS [Harris Corporation]
Homepage  http://www.harris.com
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SEMICONDUCT OR
4-192
March 1997
82C37A
CMOS High Performance
Programmable DMA Controller
Features
• Compatible with the NMOS 8237A
• Four Independent Maskable Channels with Autoinitial-
ization Capability
• Cascadable to any Number of Channels
• High Speed Data Transfers:
- Up to 4MBytes/sec with 8MHz Clock
- Up to 6.25MBytes/sec with 12.5MHz Clock
• Memory-to-Memory Transfers
• Static CMOS Design Permits Low Power Operation
- ICCSB = 10
µA Maximum
- ICCOP = 2mA/MHz Maximum
• Fully TTL/CMOS Compatible
• Internal Registers may be Read from Software
Description
The 82C37A is an enhanced version of the industry standard
8237A Direct Memory Access (DMA) controller, fabricated
using Harris’ advanced 2 micron CMOS process. Pin
compatible
with
NMOS
designs,
the
82C37A
offers
increased
functionality,
improved
performance,
and
dramatically reduced power consumption. The fully static
design permits gated clock operation for even further
reduction of power.
The 82C37A controller can improve system performance by
allowing external devices to transfer data directly to or from
system memory. Memory-to-memory transfer capability is
also provided, along with a memory block initialization fea-
ture. DMA requests may be generated by either hardware or
software, and each channel is independently programmable
with a variety of features for flexible operation.
The 82C37A is designed to be used with an external
address latch, such as the 82C82, to demultiplex the most
significant 8-bits of address. The 82C37A can be used with
industry standard microprocessors such as 80C286, 80286,
80C86, 80C88, 8086, 8088, 8085, Z80, NSC800, 80186 and
others. Multimode programmability allows the user to select
from three basic types of DMA services, and reconfiguration
under program control is possible even with the clock to the
controller stopped. Each channel has a full 64K address and
word count range, and may be programmed to autoinitialize
these registers following DMA termination (end of process).
Ordering Information
PART NUMBER
PACKAGE
TEMPERATURE
RANGE
PKG. NO.
5MHz
8MHz
12.5MHz
CP82C37A-5
CP82C37A
CP82C37A-12
40 Ld PDIP
0oC to +70oC
E40.6
IP82C37A-5
IP82C37A
IP82C37A-12
-40oC to +85oC
E40.6
CS82C37A-5
CS82C37A
CS82C37A-12
44 Ld PLCC
0oC to +70oC
N44.65
IS82C37A-5
IS82C37A
IS82C37A-12
-40oC to +85oC
N44.65
CD82C37A-5
CD82C37A
CD82C37A-12
40 Ld CERDIP
0oC to +70oC
F40.6
ID82C37A-5
ID82C37A
ID82C37A-12
-40oC to +85oC
F40.6
MD82C37A-5/B
MD82C37A/B
MD82C37A-12/B
-55oC to +125oC
F40.6
5962-9054301MQA
5962-9054302MQA
5962-9054303MQA
SMD#
F40.6
MR82C37A-5/B
MR82C37A/B
MR82C37A-12/B
44 Pad CLCC
-55oC to +125oC
J44.A
5962-9054301MXA
5962-9054302MXA
5962-9054303MXA
SMD#
J44.A
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© Harris Corporation 1997
File Number
2967.1




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