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ZSC31050 Datasheet(PDF) 11 Page - Integrated Device Technology |
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ZSC31050 Datasheet(HTML) 11 Page - Integrated Device Technology |
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11 / 29 page  ZSC31050 Datasheet © 2017 Integrated Device Technology, Inc. 11 February 13, 2017 1.5 Interface Characteristics No. Parameter Symbol Conditions Min Typ Max Unit 1.5.1 Multiport Serial Interfaces (I2C, SPI) 1.5.1.1 Input high level [a] VI2C_IN_H 0.7 1 VDDA - 5.5 V DC 1.5.1.2 Input low level VI2C_IN_L 0 0.3 VDDA 1.5.1.3 Output low level VI2C_OUT_L 0.1 VDDA 1.5.1.4 Load capacitance at the SDA pin CSDA 400 pF 1.5.1.5 Clock frequency at the SCL pin [b] fSCL fCLK ≥ 2MHz 400 kHz 1.5.1.6 Pull-up resistor RI2C_PU 500 1.5.1.7 Input capacitance (each pin) CI2C_IN Also valid for SPI. 10 pF 1.5.2 One-Wire Serial Interface (ZACwire™) 1.5.2.1 OWI start window tOWI_start 20 ms 1.5.2.2 Pull-up resistance master ROWI_PU 330 1.5.2.3 OWI load capacitance COWI_LOAD 20 s < tOWI_BIT < 100s 0.08 tOWI_BIT / ROWI_PU 1.5.2.4 Voltage level low VOWI_L 0.2 VDDA 1.5.2.5 Voltage level high VOWI_H 0.75 VDDA [a] The maximum value in V DC is independent from VDDA in I2C Mode. [b] Internal clock frequency fCLK must be at least 5 times higher than the communication clock frequency. |
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