HMC6300 datasheet(5/26 Pages) AD

Part #	HMC6300

Description	Output power for 1 dB compression

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HMC6300

Data Sheet

Rev. B | Page 4 of 25

ELECTRICAL SPECIFICATIONS, 63 GHz TO 64 GHz

Table 2. Electrical Specifications, 63 GHz to 64 GHz

Parameter

Test Conditions/Comments

Min

Typ

Max

Unit

FREQUENCY STEP SIZE

With 71.4286 MHz reference clock

250

MHz

With 142.857 MHz reference clock

500

MHz

With 154.2857 MHz reference clock

540

MHz

MODULATION BANDWIDTH

Full I/Q bandwidth

1.8

GHz

GAIN

Maximum Gain

30.5

32

dB

Modulator Gain Control

High and low gain settings

9

dB

IF Gain Control

14

dB

RF Gain Control

22

dB

OUTPUT POWER

Output Power for 1 dB Compression (P1dB)

Balanced into 100 Ω

15

dBm

Saturated Output Power (PSAT)

Balanced into 100 Ω

13.9

17

dBm

Output Power for 1 dB Compression (P1dB)

Singled-ended into 50 Ω

12

dBm

Saturated Output Power(PSAT)

Singled-ended into 50 Ω

14

dBm

Detector Power

−10 to +15

dBm

TEMPERATURE SENSOR RANGE

Four levels

−40

+85

°C

SUPPRESSION AND REJECTION

Sideband Suppression

15

30

dBc

Image Rejection

40

dBc

LO Suppression

At 6/7 of RF carrier frequency (3 × LO)

10

20

dBc

Carrier Suppression

Without calibration

30

dBc

PHASE

Phase Noise @ 100 kHz Offset

−75

dBc/Hz

Phase Noise @ 1 MHz Offset

−93

dBc/Hz

Phase Noise @ 10 MHz Offset

−114

dBc/Hz

Phase Noise @ 100 MHz Offset

−122

dBc/Hz

PLL Bandwidth

Using internal filter

300

kHz

POWER DISSIPATION

Balanced

1.0

W

Single-Ended

0.88

W

Balanced, External LO)

0.75

W

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