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XMS430FR5994IPNR Datasheet(PDF) 7 Page - Texas Instruments |
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XMS430FR5994IPNR Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 169 page  DVSS3 RST DVCC3 P2.3 DGND L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 K1 J1 H1 G1 F1 E1 D1 C1 B1 A1 B1 K2 K3 K4 K5 K6 K7 K8 K9 K10 K11 J2 H2 G2 F2 E2 D2 C2 A2 B3 A3 H4 G4 F4 E4 D4 B4 A4 H5 D5 B5 A5 H6 D6 B6 A6 H7 D7 B7 A7 H8 G8 F8 E8 D8 B8 A8 B9 A9 J10 H10 G10 F10 E10 D10 C10 B10 A10 J11 H11 G11 F11 E11 D11 C11 B11 A11 AGND DGND P8.2 P3.4 AVSS1 P2.0 LFOUT LFIN P2.7 HFOUT HFIN DVSS1 P2.4 P2.2 P1.7 P5.1 P5.2 P4.6 DGND P5.4 P2.6 TST P8.3 P3.6 P3.7 P4.4 P4.5 P5.5 P4.2 P4.3 P2.5 P5.7 P5.6 P4.0 P7.7 P4.1 P6.4 P6.5 P7.4 P7.5 P7.6 P6.6 AVSS3 P7.2 PJ.3 P7.3 P6.0 AVSS2 P8.0 P4.7 P6.1 PJ.1 PJ.2 P6.7 PJ.0 P1.5 P7.1 P1.4 P6.3 P3.2 P3.1 P1.2 AGND DGND P1.3 P7.0 DVCC2 P6.2 P3.3 P3.0 P1.1 P1.0 DVSS2 AVCC1 DVCC1 DGND P2.1 P8.1 P3.5 P1.6 P5.0 P5.3 7 MSP430FR5994, MSP430FR59941, MSP430FR5992, MSP430FR5964, MSP430FR5962 www.ti.com SLASE54B – MARCH 2016 – REVISED JANUARY 2017 Submit Documentation Feedback Product Folder Links: MSP430FR5994 MSP430FR59941 MSP430FR5992 MSP430FR5964 MSP430FR5962 Terminal Configuration and Functions Copyright © 2016–2017, Texas Instruments Incorporated 4 Terminal Configuration and Functions 4.1 Pin Diagrams Figure 4-1 shows the bottom view of the pinout of the 87-pin ZVW package, and Figure 4-2 shows the top view of the pinout. NOTE: On devices with UART BSL: P2.0 is BSLTX, P2.1 is BSLRX NOTE: On devices with I2C BSL: P1.6 is BSLSDA, P1.7 is BSLSCL Figure 4-1. 87-Pin ZVW Package (Bottom View) |
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Similar Description - XMS430FR5994IPNR |
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