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DRA724JGABCRQ1 Datasheet(PDF) 6 Page - Texas Instruments |
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DRA724JGABCRQ1 Datasheet(HTML) 6 Page - Texas Instruments |
6 / 409 page 6 DRA722, DRA724, DRA725, DRA726 SPRS956B – MARCH 2016 – REVISED JANUARY 2017 www.ti.com Submit Documentation Feedback Product Folder Links: DRA722 DRA724 DRA725 DRA726 Device Comparison Copyright © 2016–2017, Texas Instruments Incorporated (1) ECC is not available on this device, but signal names are retained for consistency with the DRA7xx family of devices. 3 Device Comparison 3.1 Device Comparison Table Table 3-1 shows a comparison between devices, highlighting the differences. Table 3-1. Device Comparison Features Device DRA722 DRA724 DRA725 DRA726 Processors/Accelerators Speed Grades H J L P ARM Single Cortex-A15 Microprocessor (MPU) Subsystem MPU core 0 Yes C66x VLIW DSP DSP1 Yes BitBLT 2D Hardware Acceleration Engine (BB2D) BB2D Yes Display Subsystem VOUT1 Yes VOUT2 Yes VOUT3 Yes HDMI Yes Dual ARM Cortex-M4 Image Processing Unit (IPU) IPU1 Yes IPU2 Yes Image Video Accelarator (IVA) IVA Yes SGX544 Single-Core 3D Graphics Processing Unit (GPU) GPU Yes Video Input Port (VIP) VIP1 vin1a Yes vin1b Yes vin2a Yes vin2b Yes Video Processing Engine (VPE) VPE Yes Program/Data Storage On-Chip Shared Memory (RAM) OCMC_RAM1 512KB General-Purpose Memory Controller (GPMC) GPMC Yes DDR3 Memory Controller EMIF1 up to 2GB across single chip select SECDED/ECC (1) No Dynamic Memory Manager (DMM) DMM Yes Radio Support Audio Tracking Logic (ATL) ATL Yes Viterbi Coprocessor (VCP) VCP1 Yes VCP2 Yes Peripherals Dual Controller Area Network (DCAN) Interface DCAN1 Yes DCAN2 Yes Enhanced DMA (EDMA) EDMA Yes System DMA (DMA_SYSTEM) DMA_SYSTEM Yes Ethernet Subsystem (Ethernet SS) GMAC_SW[0] MII, RMII, or RGMII GMAC_SW[1] MII, RMII, or RGMII General-Purpose I/O (GPIO) GPIO Up to 215 Inter-Integrated Circuit Interface (I2C) I2C 6 System Mailbox Module MAILBOX 13 Media Local Bus Subsystem (MLBSS) MLB Yes |
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