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ICS9FG108YFLF-T Datasheet(PDF) 4 Page - Integrated Circuit Systems |
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ICS9FG108YFLF-T Datasheet(HTML) 4 Page - Integrated Circuit Systems |
4 / 13 page 4 Integrated Circuit Systems, Inc. ICS9FG108 Advance Information 0823—04/02/04 ICS9FG108 is a Frequency Timing Generator that provides 8 differential output pairs that are compliant to the Intel CK410 specification. It also provides support for PCI-Express, next generation I/O, and SATA. The part synthesizes several output frequencies from either a 14.31818 Mhz crystal or a 25 MHz crystal. The device can also be driven by a reference input clock instead of a crystal. It provides outputs with cycle-to-cycle jitter of less than 85 ps and output-to-output skew of less than 85 ps. ICS9FG108 also provides a copy of the reference clock. Frequency selection can be accomplished via strap pins or SMBus control. General Description Block Diagram Power Groups VDD GND 34 10,14,19,31,36,40 15,35 N/A 47 48 47 IREF Analog VDD & GND for PLL Core Description Pin Number REFOUT, Digital Inputs, SMBus DIF Outputs STOP LOGIC XIN/CLKIN X2 DIF(7:0) CONTROL LOGIC SPREAD FS(2:0) SDATA SCLK SEL14M_25M# DIF_STOP# PROGRAMMABLE SPREAD PLL 4 IREF OSC R EF OU T OE(7:0) |
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