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ZSPM4523 Datasheet(PDF) 15 Page - Integrated Device Technology |
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ZSPM4523 Datasheet(HTML) 15 Page - Integrated Device Technology |
15 / 24 page ZSPM4523 Datasheet © 2016 Integrated Device Technology, Inc. 15 January 29, 2016 Table 3.3 Configuration Register CONFIG1—Address 02HEX Note: All of the CONFIG1 register bits are READ/WRITE. Data Bit D7 D6 D5 D4 D3 D2 D1 D0 Field Name Not Used V_TERM [2:0] Not Used Field Name Bit Definition V_TERM [2:0] Voltage Termination (VOUT) Configuration: 000 – 2.48V 001 – 2.54V 010 – 2.60V 011 – 2.66V 100 – 2.68V 101 – 2.72V 110 – 2.74V 111 – (Factory use only) Table 3.4 Configuration Register CONFIG3—Address 04HEX Note: All of the CONFIG3 register bits are READ/WRITE. Data Bit D7 D6 D5 D4 D3 D2 D1 D0 Field Name MAX_CHRG_CURR [3:0] Not Used Field Name Bit Definition MAX_CHRG_CURR [3:0] Maximum Charge Current (IOUT) Configuration: 0000 – 50mA 0001 – 100mA 0010 – 200mA 0011 – 300mA 0100 – 400mA 0101 – 500mA 0110 – 600mA 0111 – 700mA 1000 – 800mA 1001 – 900mA 1010 – 1000mA 1011 – 1100mA 1100 – 1200mA 1101 – 1300mA 1110 – 1400mA 1111 – 1500mA |
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