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ZSPM1501ZA1W0 Datasheet(PDF) 29 Page - Integrated Device Technology |
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ZSPM1501ZA1W0 Datasheet(HTML) 29 Page - Integrated Device Technology |
29 / 101 page ZSPM15xx Datasheet © 2016 Integrated Device Technology, Inc. 29 January 27, 2016 3 Functional Description 3.1. Power Supply Circuitry, Reference Decoupling, and Grounding The ZSPM15xx incorporates several internal power regulators in order to derive all required supply and bias voltages from a single external supply voltage of 5.0V. Decoupling capacitors are required at the VDD33, VDD18, and AVDD18 pins (1.0µF minimum; 4.7µF recommended). The reference voltages required for operation are generated within the ZSPM15xx. External decoupling must be provided between the VREFP and ADCVREF pins. Therefore, a 4.7µF capacitor is required at the VREFP pin and a 100nF capacitor at ADCVREF pin. The two pins should be connected with approximately 50 Ω resistance in order to provide sufficient decoupling between the pins. Three different ground connections are available on the outside of the package. These should be connected together to a single ground tie. A differentiation between analog and digital ground is not required. 3.2. Reset/Start-up Behavior The ZSPM15xx employs an internal power-on-reset (POR) circuit to ensure proper start-up and shut-down with a changing supply voltage. Once the supply voltage increases above the POR threshold voltage (see section 1.3), the ZSPM15xx begins the internal start-up process. Upon its completion, the device is ready for operation. 3.3. Digital Power Control 3.3.1. Overview The digital power control loop consists of the integral parts required for the control functionality of the ZSPM15xx. A high-speed analog front-end is used to digitize the output voltage. A digital control core uses the acquired information to provide duty-cycle information to the PWM, which controls the drive signals to the power stage. See section 7 for the pre-configured nominal output voltages for the different part codes available in the ZSPM15xx family. 3.3.2. Output Voltage Feedback The voltage feedback signal is sampled with a high-speed analog front-end. The feedback voltage is differentially measured and subtracted from an internal voltage reference using an error amplifier. A flash ADC is then used to convert the voltage into its digital equivalent. This is followed by internal digital filtering to improve the system’s noise rejection. For some applications, an external feedback divider (R4 and R5; see Figure 4.1) is required to allow for output voltage operations above the internal reference voltage. For details, refer to the application section 4.3. |
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