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HMC1099LP5DETR Datasheet(PDF) 7 Page - Analog Devices

Part # HMC1099LP5DETR
Description  Test and measurement equipment
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

HMC1099LP5DETR Datasheet(HTML) 7 Page - Analog Devices

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HMC1099
Data Sheet
Rev. A | Page 6 of 16
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
17
1
3
4
2
GND
NIC
NIC
RFIN/VGG
5
6
RFIN/VGG
NIC
7
NIC
8
GND
GND
18 NIC
19 NIC
20 RFOUT/VDD
21 RFOUT/VDD
22 NIC
23 NIC
24 GND
HMC1099
TOP VIEW
(Not to Scale)
NOTES
1. EXPOSED PAD. EXPOSED PAD MUST
BE CONNECTED TO RF/DC GROUND.
2. NO INTERNAL CONNECTION. THESE PINS
ARE NOT CONNECTED INTERNALLY.
Figure 2. Pin Configuration
Table 6. Pad Function Descriptions
Pin No.
Mnemonic
Description
1, 8, 9, 16, 17, 24, 25, 32
GND
Ground. These pins must be connected to RF/dc ground. See Figure 3 for the GND interface schematic.
2, 3, 6, 7, 10 to 15, 18,
19, 22, 23, 26 to 31
NIC
No Internal Connection. These pins are not connected internally. However, all data was measured
with these pins connected to RF/dc ground externally.
4, 5
RFIN/VGG
RF Input (RFIN)/Gate Bias Control Voltage (VGG). This pin is a multifunction pin. The RFIN/VGG pin is
dc-coupled with internal prematching and requires external matching to 50 Ω, as shown in Figure 38.
See Figure 4 for the RFIN/VGG interface schematic.
20, 21
RFOUT/VDD
RF Output (RFOUT)/Drain Bias Voltage (VDD). This is a multifunction pin. The RFOUT/VDD pin is dc-coupled
and requires external matching to 50 Ω, as shown in Figure 38. See Figure 4 for the RFOUT/VDD interface
schematic.
EPAD
Exposed Pad. The exposed pad must be connected to RF/dc ground.
INTERFACE SCHEMATICS
GND
Figure 3. GND Interface
RFOUT/VDD
RFIN/VGG
Figure 4. RFIN/VGG and RFOUT/VDD Interface


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