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PCF85116 Datasheet(PDF) 9 Page - NXP Semiconductors |
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PCF85116 Datasheet(HTML) 9 Page - NXP Semiconductors |
9 / 20 page 1997 Apr 02 9 Philips Semiconductors Product specification 2048 × 8-bit CMOS EEPROM with I2C-bus interface PCF85116-3 8.5 Read operations Read operations are initiated in the same manner as write operations with the exception that the LSB of the slave address (R/W) is set to logic 1. There are three basic read operations; current address read, random read and sequential read. 8.5.1 REMARK During read operations all bits of the memory address are incremented after each transmission of a data byte. Contrary to write operations an overflow of the memory address occurs from 2047 to 0 (see Fig.3). Fig.7 Master reads PCx85116-3 slave after setting word address (write word address; read data). handbook, full pagewidth S 0 A WORD ADDRESS A A acknowledge from slave acknowledge from slave acknowledge from slave acknowledge from master A DATA auto increment word address MBH928 P no acknowledge from master 1 DATA auto increment word address last byte R/W S1 n bytes at this moment master transmitter becomes master receiver and EEPROM slave receiver becomes slave transmitter B B B B B B SLAVE ADDRESS R/W SLAVE ADDRESS Fig.8 Master reads PCx85116-3 immediately after first byte (read mode). handbook, full pagewidth S 1A DATA A1 DATA acknowledge from slave acknowledge from master no acknowledge from master auto increment word address MBH929 auto increment word address n bytes last bytes P B B B SLAVE ADDRESS R/W |
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