RP153L

NO.EA-201-150901

4

PIN DESCRIPTIONS

Top View

8

7

6

1

2

3

4

5

Bottom View

56

7

32

1

4

8



DFN1216-8 Pin Configuration

DFN1216-8 Pin Description

Pin No.

Symbol

Description

1

GND

Ground Pin

2

VOUT1

Output Pin 1

3

VOUT2

Output Pin 2

4

GND

Ground Pin

5

CE2

Chip Enable Pin 2, Active-high

6

VDD2

Input Pin 2

7

VDD1

Input Pin 1

8

CE1

Chip Enable Pin 1, Active-high

 The tab on the bottom of the package enhances thermal performance and is electrically connected to GND (substrate

level). It is recommended that the tab be connected to the ground plane on the board, or otherwise be left floating.