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NM27C256VE150 Datasheet(PDF) 5 Page - National Semiconductor (TI) |
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NM27C256VE150 Datasheet(HTML) 5 Page - National Semiconductor (TI) |
5 / 12 page Programming Characteristics (Notes 1 2 3 4 and 5) Symbol Parameter Conditions Min Typ Max Units tAS Address Setup Time 1 m s tOES OE Setup Time 1 m s tVPS VPP Setup Time 1 m s tVCS VCC Setup Time 1 m s tDS Data Setup Time 1 m s tAH Address Hold Time 0 m s tDH Data Hold Time 1 m s tDF Output Enable to Output CE e VIL 060 ns Float Delay tPW Program Pulse Width 95 100 105 m s tOE Data Valid from OE CE e VIL 100 ns IPP VPP Supply Current CE e VIL 30 mA during Programming Pulse ICC VCC Supply Current 50 mA TA Temperature Ambient 20 25 30 C VCC Power Supply Voltage 60 625 65 V VPP Programming Supply Voltage 125 1275 130 V tFR Input Rise Fall Time 5 ns VIL Input Low Voltage 00 045 V VIH Input High Voltage 24 40 V tIN Input Timing Reference Voltage 08 20 V tOUT Output Timing Reference Voltage 08 20 V Programming Waveforms (Note 3) TLD10833 – 5 Note 1 National’s standard product warranty applies to devices programmed to specifications described herein Note 2 VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP The EPROM must not be inserted into or removed from a board with voltage applied to VPP or VCC Note 3 The maximum absolute allowable voltage which may be applied to the VPP pin during programming is 14V Care must be taken when switching the VPP supply to prevent any overshoot from exceeding this 14V maximum specification At least a 01 mF capacitor is required across VPP VCC to GND to suppress spurious voltage transients which may damage the device Note 4 Programming and program verify are tested with the Fast Program Algorithm at typical power supply voltages and timings Note 5 During power up the PGM pin must be brought high (t VIH) either coincident with or before power is applied to VPP 5 |
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