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ALC202 Datasheet(PDF) 2 Page - List of Unclassifed Manufacturers |
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ALC202 Datasheet(HTML) 2 Page - List of Unclassifed Manufacturers |
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2 / 29 page  Preliminary Avance Logic, Inc. ALC202 - 2 - Rev0.62 http://www.realtek.com.tw 1. Features l Single chip audio CODEC with high S/N ratio (>90 dB). l 20-bit DAC, 18-bit ADC. l Stereo full-duplex CODEC with independent and variable sampling rate. l 4 analog line-level stereo input with 5-bit volume control : LINE_IN,CD,VIDEO,AUX l 2 analog line-level mono input : PC_BEEP,PHONE_IN. l Mono output with 5-bit volume control. l Stereo output with 6-bit volume control. l 2 MIC inputs: Software selectable. l Power management and enhanced power saving. l 3D Stereo Enhancement l External Amplifier power down capability. l Multiple CODEC extension. l Compliant with AC’97 2.2 specification l 50mW/8W amplifier at LINE/ Headphone output l Jack-detect function to mute LINE/MONO/HP output, to control S/PDIF output. l Supports S/PDIF out is compliant with AC’97 rev2.2. l 2 GPIO pins. l 14.318MHzà24.576MHz digital PLL. l Supports double sampling rate (96KHz) of DVD audio playback. l +30dB boost preamplifier for MIC input. l Power support: Digital: 3.3V Analog: 3.3V/5V l Standard 48-Pin LQFP Package 2. Pin Description 2.1 Digital I/O pins: 11 pins Name Type Pin No Description Characteristic Definition RESET# I 11 AC'97 H/W reset Schmitt trigger input XTL-IN I 2 Crystal input pad Crystal: 24.576M/14.318M crystal input External: 24.576M/14.318M external clock input XTL-OUT O 3 Crystal output pad Crystal: 24.576M/14.318M crystal output External: 24.576M/14.318M clock output SYNC I 10 Sample Sync (48KHz) Schmitt trigger input BIT-CLK IO 6 Bit clock output (12.288Mhz) CMOS input/output Vt=0.35Vdd SDATA-OUT I 5 Serial TDM AC97 output Schmitt trigger input SDATA-IN O 8 Serial TDM AC97 input CMOS output, GPIO0 I/O 43 I: General purpose input pin-0. (Can be software volume up) O: General purpose output pin-0. Internally pulled high by a 50K resistor. GPIO1 I/O 44 I: General purpose input pin-1. (Can be software volume down) O: General purpose output pin-1 Internally pulled high by a 50K resistor. ID0# I 45 ID strap 0 CMOS input Vt=0.35Vdd EAPD / JD O 47 External Amplifier power down control / Jack –Detect sense a low to high edge CMOS output / input, JD should be internally pulled high by a 50K resistor SPDIFO / TEST O 48 S/PDIF output / TEST output Digital output has 12 mA@75W driving capability. 2.2 Analog I/O Pins: 18 pins Name Type Pin No Description Characteristic Definition PC-BEEP I 12 PC speaker input Analog input (1Vrms) PHONE I 13 Speakerphone input Analog input (1Vrms) AUX-L I 14 AUX Left channel Analog input (1Vrms) AUX-R I 15 AUX Right channel Analog input (1Vrms) VIDEO-L I 16 Video audio Left channel Analog input (1Vrms) VIDEO-R I 17 Video audio Right channel Analog input (1Vrms) |
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