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MC12034BD Datasheet(PDF) 1 Page - Motorola, Inc |
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MC12034BD Datasheet(HTML) 1 Page - Motorola, Inc |
1 / 4 page MC12034A MC12034B Order this document by MC12034A/D SEMICONDUCTOR TECHNICAL DATA MECL PLL COMPONENTS ÷32/33, ÷64/65 DUAL MODULUS PRESCALER P SUFFIX PLASTIC PACKAGE CASE 626 PIN CONNECTIONS D SUFFIX PLASTIC PACKAGE CASE 751 (SO–8) 8 1 1 8 IN (Top View) 8 IN VCC SW OUT NC MC Gnd 7 6 5 1 2 3 4 Device Operating Temp Range Package ORDERING INFORMATION MC12034AD MC12034AP TA = –40° to +85°C SO–8 Plastic MC12034BD MC120348BP SO–8 Plastic 2.0GHz Dual Modulus Prescaler The MC12034A can be used with CMOS synthesizers requiring positive edges to trigger internal counters such as Motorola’s MC145xxx series in a PLL to provide tuning signals up to 2.0 GHz in programmable frequency steps. The MC12034B can be used with CMOS synthesizers requiring negative edges to trigger internal counters such as Fujitsu’s MB87001. A Divide Ratio Control (SW) permits selection of a 32/33 or 64/65 divide ratio as desired. The Modulus Control (MC) selects the proper divide number after SW has been biased to select the desired divide ratio. • 2.0 GHz Toggle Frequency • Supply Voltage 4.5 to 5.5 V • MC12034A for Positive Edge Triggered Synthesizers • 12mA Maximum, –40 to 85°C, VCC = 5.5 Vdc • Modulus Control Input is Compatible with Standard CMOS and TTL • Low–Power 8.5 mA Typical FUNCTIONAL TABLE SW MC Divide Ratio H H 32 H L 33 L H 64 L L 65 NOTES: 1. SW: H = VCC, L = Open. A logic L can also be applied by grounding this pin, but this is not recommended due to increased power consumption. 2. MC: H = 2.0 V to VCC, L = GND to 0.8 V. Design Criteria Value Unit Internal Gate Count * 67 ea Internal Gate Propagation Delay 200 ps Internal Gate Power Dissipation 0.75 mW Speed Power Product 0.15 pJ NOTE: *Equivalent to a two–input NAND gate. MAXIMUM RATINGS Characteristic Symbol Range Unit Power Supply Voltage, Pin 2 VCC –0.5 to +7.0 Vdc Operating Temperature Range TA –40 to +85 °C Storage Temperature Range Tstg –65 to +150 °C Modulus Control Input, Pin 6 MC –0.5 to +6.5 Vdc NOTES: 1. ESD data available upon request. 2. This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high impedance circuit. For proper operation, Vin and Vout should be constrained to the range GND ≤ (Vin or Vout) ≤ VCC. © Motorola, Inc. 1997 Rev 3 |
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