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ISLA112P25M Datasheet(PDF) 3 Page - Intersil Corporation |
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ISLA112P25M Datasheet(HTML) 3 Page - Intersil Corporation |
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3 / 29 page  ISLA112P25M 3 FN7646.1 November 17, 2011 20, 21 CLKP, CLKN Clock Input True, Complement 22 OUTMODE Tri-Level Output Mode Control (LVDS, LVCMOS) 23 NAPSLP Tri-Level Power Control (Nap, Sleep modes) 25 RESETN Power On Reset (Active Low, see page 15) 26, 45, 55, 65 OVSS Output Ground 27, 36, 56 OVDD 1.8V Output Supply 32 D0N [NC] LVDS Bit 0 (LSB) Output Complement [NC in LVCMOS] DDR Logical Bits 1, 0 (LVDS) 33 D0P [D0] LVDS Bit 0 (LSB) Output True [LVCMOS Bit 0] DDR Logical Bits 1, 0 (LVDS or CMOS) 34 D1N [NC] LVDS Bit 1 Output Complement [NC in LVCMOS] NC in DDR 35 D1P [D1] LVDS Bit 1 Output True [LVCMOS Bit 1] NC in DDR 37 D2N [NC] LVDS Bit 2 Output Complement [NC in LVCMOS] DDR Logical Bits 3,2 (LVDS) 38 D2P [D2] LVDS Bit 2 Output True [LVCMOS Bit 2] DDR Logical Bits 3,2 (LVDS or CMOS) 39 D3N [NC] LVDS Bit 3 Output Complement [NC in LVCMOS] NC in DDR 40 D3P [D3] LVDS Bit 3 Output True [LVCMOS Bit 3] NC in DDR 41 D4N [NC] LVDS Bit 4 Output Complement [NC in LVCMOS] DDR Logical Bits 5,4 (LVDS) 42 D4P [D4] LVDS Bit 4 Output True [LVCMOS Bit 4] DDR Logical Bits 5,4 (LVDS or CMOS) 43 D5N [NC] LVDS Bit 5 Output Complement [NC in LVCMOS] NC in DDR 44 D5P [D5] LVDS Bit 5 Output True [LVCMOS Bit 5] NC in DDR 46 RLVDS LVDS Bias Resistor (Connect to OVSS with a 10kΩ, 1% resistor) 47 CLKOUTN [NC] LVDS Clock Output Complement [NC in LVCMOS] 48 CLKOUTP [CLKOUT] LVDS Clock Output True [LVCMOS CLKOUT] 49 D6N [NC] LVDS Bit 6 Output Complement [NC in LVCMOS] DDR Logical Bits 7,6 (LVDS) 50 D6P [D6] LVDS Bit 6 Output True [LVCMOS Bit 6] DDR Logical Bits 7,6 (LVDS or CMOS) 51 D7N [NC] LVDS Bit 7 Output Complement [NC in LVCMOS] NC in DDR 52 D7P [D7] LVDS Bit 7 Output True [LVCMOS Bit 7] NC in DDR 53 D8N [NC] LVDS Bit 8 Output Complement [NC in LVCMOS] DDR Logical Bits 9,8 (LVDS) Pin Descriptions (Continued) PIN NUMBER LVDS [LVCMOS] NAME LVDS [LVCMOS] FUNCTION SDR MODE DDR MODE COMMENTS |
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