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ISL71090SEHX50SAMPLE Datasheet(PDF) 9 Page - Intersil Corporation |
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ISL71090SEHX50SAMPLE Datasheet(HTML) 9 Page - Intersil Corporation |
9 / 13 page ISL71090SEH50 9 FN8588.3 March 15, 2016 Submit Document Feedback Device Operation Bandgap Precision Reference The ISL71090SEH50 uses a bandgap architecture and special trimming circuitry to produce a temperature compensated, precision voltage reference with high input voltage capability and moderate output current drive. Applications Information Board Mounting Considerations For applications requiring the highest accuracy, board mounting location should be reviewed. The device uses a ceramic flatpack package. Generally, mild stresses to the die when the Printed Circuit (PC) board is heated and cooled, can slightly change the shape. Because of these die stresses, placing the device in areas subject to slight twisting can cause degradation of reference voltage accuracy. It is normally best to place the device near the edge of a board, or on the shortest side, because the axis of bending is most limited in that location. Mounting the device in a cutout also minimizes flex. Obviously, mounting the device on flexprint or extremely thin PC material will likewise cause loss of reference accuracy. Board Assembly Considerations Some PC board assembly precautions are necessary. Normal output voltage shifts of typically 100µV can be expected with Pb-free reflow profiles or wave solder on multilayer FR4 PC boards. Precautions should be taken to avoid excessive heat or extended exposure to high reflow or wave solder temperatures. Noise Performance and Reduction The output noise voltage over the 0.1Hz to 10Hz bandwidth is typically 1.1µVP-P (VOUT = 5.0V). The noise measurement is made with a 9.9Hz bandpass filter. Noise in the 10Hz to 1kHz bandwidth is approximately 2.2µVRMS, with 1µF capacitance on the output. This noise measurement is made with a bandpass filter of 990Hz. Load capacitance up to 10µF (with COMP capacitor from Table 2) can be added but will result in only marginal improvements in output noise and transient response. Turn-On Time Normal turn-on time is typically 250µs, the circuit designer must take this into account when looking at power-up delays or sequencing. Temperature Coefficient The limits stated for temperature coefficient (Tempco) are governed by the method of measurement. The overwhelming standard for specifying the temperature drift of a reference is to measure the reference voltage at two temperatures, which provide for the maximum voltage deviation and take the total variation, (VHIGH -VLOW), this is then divided by the temperature extremes of measurement (THIGH –TLOW). The result is divided by the nominal reference voltage (at T = +25°C) and multiplied by 106 to yield ppm/°C. This is the “Box” method for specifying temperature coefficient. Output Voltage Adjustment The output voltage can be adjusted above and below the factory-calibrated value via the trim terminal. The trim terminal is the negative feedback divider point of the output op amp. The voltage at the trim pin is set at approximately 1.216V by the internal bandgap and amplifier circuitry of the voltage reference. The suggested method to adjust the output is to connect a 1MΩ external resistor directly to the trim terminal and connect the other end to the wiper of a potentiometer that has a 100kΩ resistance and whose outer terminals connect to VOUT and ground. If a 1MΩ resistor is connected to trim, the output adjust range will be ±6.3mV. The TRIM pin should not have any capacitor tied to its output, also it is important to minimize the capacitance on the trim terminal during layout to preserve output amplifier stability. It is also best to connect the series resistor directly to the trim terminal, to minimize that capacitance and also to minimize noise injection. Small trim adjustments will not disturb the factory-set temperature coefficient of the reference, but trimming near the extreme values can. Output Stage The output stage of the device has a push pull configuration with an high side PNP and a low-side NPN. This helps the device to act as a source and sink. The device can source 20mA. Use of COMP Capacitors The reference can be compensated for the COUT capacitors used by adding a capacitor from COMP pin to GND. See Table 2 for recommended values of the COMP capacitor. SEE Testing The SET result is based on the ISL71090SEH25. The ISL71090SEH25 and ISL71090SEH50 share the same active circuitry consisting of a precision bandgap ckt and a trimmable amplifier to set the output reference with only a resistor change to scale the output. The SET test was done under an ion beam having an LET of 86MeV•cm2/mg. The device did not latch-up or burnout to a VDD of 36V and at +125°C. Single Event transients were observed and are summarized in the Table 3: DNC Pins These pins are for trimming purpose and for factory use only. Do not connect these to the circuit in any way. It will adversely effect the performance of the reference. TABLE 2. COUT (µF) CCOMP (nF) 0.1 1 11 10 10 TABLE 3. VIN (V) IOUT (mA) COUT (µF) SET (% VOUT) 45 1 -4.6 30 5 1 -4.4 30 5 10 -1.0 |
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