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ISL95872HRUZ-T Datasheet(PDF) 11 Page - Intersil Corporation |
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ISL95872HRUZ-T Datasheet(HTML) 11 Page - Intersil Corporation |
11 / 17 page ISL95872 11 FN7974.0 January 26, 2012 Figure 13 shows the overcurrent set circuit. The inductor consists of inductance L and the DC resistance DCR. The inductor DC current IL creates a voltage drop across DCR, which is given by Equation 4: The IOCSET current source sinks 8.5µA into the OCSET pin, creating a DC voltage drop across the resistor ROCSET, which is given by Equation 5: The DC voltage difference between the OCSET pin and the VO pin, which is given by Equation 6: The IC monitors the voltage of the OCSET pin and the VO pin. When the voltage of the OCSET pin is higher than the voltage of the VO pin for more than 10µs, an OCP fault latches the converter off. The value of ROCSET is calculated with Equation 7, which is written as: Where: -ROCSET (Ω) is the resistor used to program the overcurrent setpoint -IOC is the output DC load current that will activate the OCP fault detection circuit - DCR is the inductor DC resistance For example, if IOC is 20A and DCR is 4.5mΩ, the choice of ROCSET is equal to 20A x 4.5mΩ/8.5µA = 10.5kΩ. Resistor ROCSET and capacitor CSEN form an R-C network to sense the inductor current. To sense the inductor current correctly not only in DC operation, but also during dynamic operation, the R-C network time constant ROCSET CSEN needs to match the inductor time constant L/DCR. The value of CSEN is then written as Equation 8: For example, if L is 1.5µH, DCR is 4.5m Ω, and ROCSET is 9kΩ, the choice of CSEN = 1.5µH/(9kΩ x 4.5mΩ) = 0.037µF. When an OCP fault is declared, the converter will be latched off and the PGOOD pin will be asserted low. The fault will remain latched until the EN pin has been pulled below the falling EN threshold voltage VENTHF or if VCC has decayed below the falling POR threshold voltage VVCC_THF. Undervoltage The UVP fault detection circuit triggers after the FB pin voltage is below the undervoltage threshold VUVTH for more than 2µs. For example if the converter is programmed to regulate 1.0V at the FB pin, that voltage would have to fall below the typical VUVTH threshold of 84% for more than 2µs in order to trip the UVP fault latch. In numerical terms, that would be 84% x 1.0V = 0.84V. When a UVP fault is declared, the converter will be latched off and the PGOOD pin will be asserted low. The fault will remain latched until the EN pin has been pulled below the falling EN threshold voltage VENTHF or if VCC has decayed below the falling POR threshold voltage VVCC_THF. Over-Temperature When the temperature of the IC increases above the rising threshold temperature TOTRTH, it will enter the OTP state that suspends the PWM, forcing the LGATE and UGATE gate-driver outputs low. The status of the PGOOD pin does not change nor does the converter latch-off. The PWM remains suspended until the IC temperature falls below the hysteresis temperature TOTHYS at which time normal PWM operation resumes. The OTP state can be reset if the EN pin is pulled below the falling EN threshold voltage VENTHF or if VCC has decayed below the falling POR threshold voltage VVCC_THF. All other protection circuits remain functional while the IC is in the OTP state. It is likely that the IC will detect an UVP fault because in the absence of PWM, the output voltage decays below the undervoltage threshold VUVTH. PGOOD Monitor The PGOOD pin indicates when the converter is capable of supplying regulated voltage. The PGOOD pin is an undefined impedance if the VCC pin has not reached the rising POR threshold VVCC_THR, or if the VCC pin is below the falling POR threshold VVCC_THF. If there is a fault condition of output overcurrent or undervoltage, PGOOD is asserted low. The PGOOD pull-down impedance is 50 Ω. Unlike the ISL95870, the ISL95872 does not feature overvoltage protection and PGOOD remains high during an overvoltage event. Integrated MOSFET Gate-Drivers The LGATE pin and UGATE pins are MOSFET driver outputs. The LGATE pin drives the low-side MOSFET of the converter while the UGATE pin drives the high-side MOSFET of the converter. The LGATE driver is optimized for low duty-cycle applications where the low-side MOSFET experiences long conduction times. In this environment, the low-side MOSFETs require exceptionally low rDS(ON) and tend to have large parasitic charges that conduct FIGURE 13. OVERCURRENT PROGRAMMING CIRCUIT PHASE CO L VO ROCSET CSEN OCSET VO RO DCR IL 8.5µA + _ VDCR + _ VROCSET V DCR I L DC R ⋅ = (EQ. 4) V ROCSET 8.5 μAR OCSET ⋅ = (EQ. 5) V OCSET V – VO V DCR V – ROCSET I L DC R ⋅ I OCSET ROCSET ⋅ – == (EQ. 6) (EQ. 7) R OCSET I OC DCR ⋅ I OCSET ---------------------------- = (EQ. 8) C SEN L R OCSET DCR ⋅ ------------------------------------------ = |
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