ISL95872

11

FN7974.0

January 26, 2012

Figure 13 shows the overcurrent set circuit. The inductor consists

of inductance L and the DC resistance DCR. The inductor DC

Equation 4:

given by Equation 5:

The DC voltage difference between the OCSET pin and the VO pin,

which is given by Equation 6:

The IC monitors the voltage of the OCSET pin and the VO pin.

When the voltage of the OCSET pin is higher than the voltage of

the VO pin for more than 10µs, an OCP fault latches the

converter off.

written as:

Where:

setpoint

fault detection circuit

- DCR is the inductor DC resistance

sense the inductor current. To sense the inductor current

correctly not only in DC operation, but also during dynamic

then written as Equation 8:

For example, if L is 1.5µH, DCR is 4.5m

When an OCP fault is declared, the converter will be latched off

and the PGOOD pin will be asserted low. The fault will remain

latched until the EN pin has been pulled below the falling EN

Undervoltage

The UVP fault detection circuit triggers after the FB pin voltage is

example if the converter is programmed to regulate 1.0V at the FB

threshold of 84% for more than 2µs in order to trip the UVP fault

latch. In numerical terms, that would be 84% x 1.0V = 0.84V.

When a UVP fault is declared, the converter will be latched off and

the PGOOD pin will be asserted low. The fault will remain latched

until the EN pin has been pulled below the falling EN threshold

Over-Temperature

When the temperature of the IC increases above the rising threshold

PWM, forcing the LGATE and UGATE gate-driver outputs low. The

status of the PGOOD pin does not change nor does the converter

latch-off. The PWM remains suspended until the IC temperature

PWM operation resumes. The OTP state can be reset if the EN pin is

protection circuits remain functional while the IC is in the OTP state.

It is likely that the IC will detect an UVP fault because in the absence

of PWM, the output voltage decays below the undervoltage

PGOOD Monitor

The PGOOD pin indicates when the converter is capable of

supplying regulated voltage. The PGOOD pin is an undefined

impedance if the VCC pin has not reached the rising POR threshold

undervoltage, PGOOD is asserted low. The PGOOD pull-down

impedance is 50

Ω.

Unlike the ISL95870, the ISL95872 does not feature overvoltage

protection and PGOOD remains high during an overvoltage event.

Integrated MOSFET Gate-Drivers

The LGATE pin and UGATE pins are MOSFET driver outputs. The

LGATE pin drives the low-side MOSFET of the converter while the

UGATE pin drives the high-side MOSFET of the converter.

The LGATE driver is optimized for low duty-cycle applications

where the low-side MOSFET experiences long conduction times.

In this environment, the low-side MOSFETs require exceptionally

FIGURE 13. OVERCURRENT PROGRAMMING CIRCUIT

PHASE

L

OCSET

VO

DCR

8.5µA

+

_

+

_

V

DCR

I

⋅

=

(EQ. 4)

V

ROCSET

8.5

μAR

OCSET

⋅

=

(EQ. 5)

V

OCSET

V

–

VO

V

–

ROCSET

I

⋅

I

⋅

–

==

(EQ. 6)

(EQ. 7)

R

OCSET

I

⋅

I

OCSET

----------------------------

=

(EQ. 8)

C

SEN

L

R

⋅

------------------------------------------

=