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ISL8700A Datasheet(PDF) 10 Page - Intersil Corporation |
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ISL8700A Datasheet(HTML) 10 Page - Intersil Corporation |
10 / 12 page 10 FN6381.0 October 12, 2006 Application Recommendations Best practices VIN decoupling is required, a 1μF capacitor is recommended. Coupling from the ENABLE_X pins to the sensitive UV and OV pins can cause false OV/UV events to be detected. This is most relevant for ISL8700A, ISL8702A, ISL8704A parts due to the ENABLEA and OV pins being adjacent. This coupling can be reduced by adding a ground trace between UV and the ENABLE/FAULT signals, as shown in Figure 15. The PCB traces on OV and UV should be kept as small as practical and the ENABLE_X and FAULT traces should ideally not be routed under/over the OV/UV traces on different PCB layers unless there is a ground or power plane in between. Other methods that can be used to eliminate this issue are by reducing the value of the resistors in the network connected to UV and OV (R2, R3, R5 in Figure 16) or by adding small decoupling capacitors to OV and UV (C2 and C7 in Figure 16). Both these methods act to reduce the AC impedance at the nodes, although the latter method acts to filter the signals which will also cause an increase in the time that a UV/OV fault takes to be detected . When the ISL870XA is implemented on a hot swappable card that is plugged into an always powered passive back plane an RC filter is required on the VIN pin to prevent a high dv/dt transient. With the already existing 1 μF decoupling capacitor the addition of a small series R (>50 Ω) to provide a time constant >50 μs is all that is necessary. FIGURE 15. LAYOUT DETAIL OF GND BETWEEN PINS 4 AND 5 PIN 4 PIN 5 GND ISL8700A, ISL8701A, ISL8702A, ISL8703A, ISL8704A, ISL8705A |
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