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S-89140BC-K8T2U Datasheet(PDF) 10 Page - Seiko Instruments Inc |
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S-89140BC-K8T2U Datasheet(HTML) 10 Page - Seiko Instruments Inc |
10 / 26 page MINI ANALOG SERIES CMOS OPERATIONAL AMPLIFIER S-89130/89140 Series Rev.1.0_01 10 Test Circuit (Per Circuit) 1. Power supply voltage rejection ratio, input offset voltage RF RS RS RF + − VOUT VDD VCMR = VDD / 2 • Power supply voltage rejection ratio (PSRR) The power supply voltage rejection ratio (PSRR) can be calculated by the following expression, with VOUT measured at each VDD. Test conditions: VDD = 2.7 V: VDD = VDD1, VOUT = VOUT1, VDD = 5.5 V: VDD = VDD2, VOUT = VOUT2 PSRR = 20 log VDD1 − VDD2 VOUT1 − VDD1 2 − VOUT2 − VDD2 2 × RF + RS RS • Input offset voltage (VIO) VIO = VOUT − VDD 2 × RS RF + RS Figure 5 2. Common-mode input signal rejection ratio, common-mode input voltage range RF RS RS RF + − VOUT VDD VIN VDD / 2 • Common-mode input signal rejection ratio (CMRR) The common-mode input signal rejection ratio (CMRR) can be calculated by the following expression, with VOUT measured at each VIN. Test conditions: VIN = VCMR Max.: VIN = VIN1, VOUT = VOUT1, VIN = VCMR Min.: VIN = VIN2, VOUT = VOUT2 CMRR = 20 log VIN1 − VIN2 VOUT1 − VOUT2 × RF + RS RS • Common-mode input voltage range (VCMR) The common mode input voltage range (VCMR) is the range of VIN in which the common mode input signal rejection ratio (CMRR) is satisfied when VIN is varied. Figure 6 |
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