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Si8442BA-D-IU Datasheet(PDF) 11 Page - Silicon Laboratories |
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Si8442BA-D-IU Datasheet(HTML) 11 Page - Silicon Laboratories |
11 / 32 page Si844x/5x QSOP Rev. 1.2 11 100 Mbps Supply Current (All inputs = 50 MHz square wave, CI = 15 pF on all outputs) Si8455Bx VDD1 VDD2 — — 4.3 13.3 6.5 16.6 mA Si8442Bx VDD1 VDD2 — — 7.2 7.2 9.0 9.0 mA Timing Characteristics Si845xBx, Si8442Bx Maximum Data Rate 0 — 1.0 Mbps Minimum Pulse Width — — 250 ns Propagation Delay tPHL,tPLH See Figure 2 — — 35 ns Pulse Width Distortion |tPLH – tPHL| PWD See Figure 2 — — 25 ns Propagation Delay Skew3 tPSK(P-P) — — 40 ns Channel-Channel Skew tPSK — — 35 ns Si845xBx, Si8442Bx Maximum Data Rate 0 — 150 Mbps Minimum Pulse Width — — 6.0 ns Propagation Delay tPHL, tPLH See Figure 2 3.0 6.0 9.5 ns Pulse Width Distortion |tPLH – tPHL| PWD See Figure 2 — 1.5 2.5 ns Propagation Delay Skew3 tPSK(P-P) —2.0 3.0 ns Channel-Channel Skew tPSK —0.5 1.8 ns Table 5. Electrical Characteristics1 (Continued) (VDD1 = 2.70 V, VDD2 = 2.70 V, TA = –40 to 125 °C) Parameter Symbol Test Condition Min Typ Max Unit Notes: 1. Specifications in this table are also valid at VDD1 = 2.6 V and VDD2 = 2.6 V when the operating temperature range is constrained to TA = 0 to 85 °C. 2. The nominal output impedance of an isolator driver channel is approximately 85 , ±40%, which is a combination of the value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads where transmission line effects will be a factor, output pins should be appropriately terminated with controlled impedance PCB traces. 3. tPSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at the same supply voltages, load, and ambient temperature. 4. Start-up time is the time period from the application of power to valid data at the output. |
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