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SI844X Datasheet(PDF) 9 Page - Silicon Laboratories |
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SI844X Datasheet(HTML) 9 Page - Silicon Laboratories |
9 / 32 page Si844x/5x QSOP Rev. 1.2 9 100 Mbps Supply Current (All inputs = 50 MHz square wave, CI = 15 pF on all outputs) Si8455Bx VDD1 VDD2 — — 4.4 16.8 6.6 21 mA Si8442Bx VDD1 VDD2 — — 8.6 8.6 10.8 10.8 mA Timing Characteristics Si845xBx, Si8442Bx Maximum Data Rate 0 — 1.0 Mbps Minimum Pulse Width — — 250 ns Propagation Delay tPHL,tPLH See Figure 2 — — 35 ns Pulse Width Distortion |tPLH - tPHL| PWD See Figure 2 — — 25 ns Propagation Delay Skew2 tPSK(P-P) — — 40 ns Channel-Channel Skew tPSK — — 35 ns Si845xBx, Si8442Bx Maximum Data Rate 0 — 150 Mbps Minimum Pulse Width — — 6.0 ns Propagation Delay tPHL, tPLH See Figure 2 3.0 6.0 9.5 ns Pulse Width Distortion |tPLH - tPHL| PWD See Figure 2 — 1.5 2.5 ns Propagation Delay Skew2 tPSK(P-P) —2.0 3.0 ns Channel-Channel Skew tPSK —0.5 1.8 ns All Models Output Rise Time tr CL =15pF See Figure 2 —4.3 6.1 ns Output Fall Time tf CL =15pF See Figure 2 —3.0 4.3 ns Common Mode Transient Immunity CMTI VI =VDD or 0 V — 25 — kV/µs Enable to Data Valid ten1 See Figure 1 — 5.0 8.0 ns Enable to Data Tri-State ten2 See Figure 1 — 7.0 9.2 ns Start-up Time3 tSU —15 40 µs Table 4. Electrical Characteristics (Continued) (VDD1 = 3.3 V±10%, VDD2 = 3.3 V±10%, TA = –40 to 125 °C) Parameter Symbol Test Condition Min Typ Max Unit Notes: 1. The nominal output impedance of an isolator driver channel is approximately 85 , ±40%, which is a combination of the value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads where transmission line effects will be a factor, output pins should be appropriately terminated with controlled impedance PCB traces. 2. tPSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at the same supply voltages, load, and ambient temperature. 3. Start-up time is the time period from the application of power to valid data at the output. |
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