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71V416L12BEGI Datasheet(PDF) 2 Page - Integrated Device Technology |
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71V416L12BEGI Datasheet(HTML) 2 Page - Integrated Device Technology |
2 / 9 page 6.42 2 IDT71V416S, IDT71V416L, 3.3V CMOS Static RAM 4 Meg (256K x 16-Bit) Commercial and Industrial Temperature Ranges *Pin 28 can either be a NC or connected to Vss Top View Pin Configurations - SOJ/TSOP Pin Descriptions SOJ Capacitance (TA = +25°C, f = 1.0MHz) NOTE: 1. This parameter is guaranteed by device characterization, but not production tested. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 I/O7 A9 A8 A7 A6 A5 WE I/O6 I/O5 I/O4 VSS VDD I/O3 I/O2 I/O1 I/O0 CS A4 A3 A2 A1 A0 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A16 A15 OE BHE BLE I/O15 I/O14 I/O13 I/O12 VSS VDD I/O11 I/O10 I/O9 I/O8 A14 A13 A12 A11 A10 A17 NC* PHG44 PBG44 3624 drw 02 A0 - A17 Address Inputs Input CS Chip Select Input WE Write Enable Input OE Output Enable Input BHE High Byte Enable Input BLE Low Byte Enable Input I/O0 - I/O15 Data Input/Output I/O VDD 3.3V Power Pwr VSS Ground Gnd 3624 tbl 01 Symbol Parameter(1) Conditions Max. Unit CIN Input Capacitance VIN = 3dV 7 pF CI/O I/O Capacitance VOUT = 3dV 8 pF 3624 tbl 02 1 2 3 456 A BLE OE A0 A1 A2 NC BI/O0 BHE A3 A4 CS I/O8 CI/O1 I/O2 A5 A6 I/O10 I/O9 DVSS I/O3 A17 A7 I/O11 VDD EVDD I/O4 NC A16 I/O12 VSS FI/O6 I/O5 A14 A15 I/O13 I/O14 GI/O7 NC A12 A13 WE I/O15 HNC A8 A9 A10 A11 NC 3624 tbl 11 Pin Configurations - 48 BGA 48 BGA Capacitance (TA = +25°C, f = 1.0MHz) Symbol Parameter(1) Conditions Max. Unit CIN Input Capacitance VIN = 3dV 6 pF CI/O I/O Capacitance VOUT = 3dV 7 pF 3624 tbl 02b Top View 71V416BE BE48 48- BGA |
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