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723676L15PFG Datasheet(PDF) 10 Page - Integrated Device Technology |
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723676L15PFG Datasheet(HTML) 10 Page - Integrated Device Technology |
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10 / 39 page  10 IDT723656/723666/723676 CMOS TRIPLE BUS SyncFIFOTM WITH BUS MATCHING 2,048 x 36 x 2, 4,096 x 36 x 2 and 8,192 x 36 x 2 COMMERCIALTEMPERATURERANGE SWITCHING CHARACTERISTICS OVER RECOMMENDED RANGES OF SUPPLY VOLTAGE AND OPERATING FREE-AIR TEMPERATURE, CL = 30PF Commercial IDT723656L12 IDT723656L15 IDT723666L12 IDT723666L15 IDT723676L12 IDT723676L15 Symbol Parameter Min. Max. Min. Max. Unit tA Access Time, CLKA ↑ toA0-A35andCLKB↑ toB0-B17 2 8 2 10 ns tWFF Propagation Delay Time, CLKA ↑ to FFA/IRA and CLKC↑ to FFC/IRC 2 8 2 8 ns tREF Propagation Delay Time, CLKA ↑ to EFA/ORA and CLKB↑ to EFB/ORB 1 8 1 8 ns tPAE Propagation Delay Time, CLKA ↑ to AEA and CLKB↑ to AEB 1 818 ns tPAF Propagation Delay Time, CLKA ↑ to AFA and CLKC↑ to AFC 1 818 ns tPMF Propagation Delay Time, CLKA ↑ to MBF1 LOW or MBF2 HIGH, CLKB↑ to MBF1 0 808 ns HIGH, and CLKC ↑ to MBF2 LOW tPMR Propagation Delay Time, CLKA ↑ to B0-B17(1)and CLKC↑ to A0-A35(2) 28 2 10 ns tMDV Propagation Delay Time, MBA to A0-A35 valid and MBB to B0-B17 valid 2 8 2 10 ns tRSF Propagation Delay Time, MRS1 or PRS1 LOW to AEB LOW, AFA HIGH, and MBF1 1 10115 ns HIGH and MRS2 or PRS2 LOW to AEA LOW, AFC HIGH, and MBF2 HIGH tEN Enable Time, CSA or W/RA LOW to A0-A35 Active and CSB LOW to B0-B17 Active 2 6 2 10 ns tDIS Disable Time, CSA or W/RA HIGH to A0-A35 at high impedance and CSB HIGH 1 6 1 8 ns to B0-B17 at HIGH impedance NOTES: 1. Writing data to the mail1 register when the B0-B17 outputs are active and MBB is HIGH. 2. Writing data to the mail2 register when the A0-A35 outputs are active and MBA is HIGH. 3. Industrial temperature range is available by special order. (Commercial: VCC = 5V ± 10%, TA = 0 °C to +70°C) |
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