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CDCE813QPWRQ1 Datasheet(PDF) 10 Page - Texas Instruments

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Part # CDCE813QPWRQ1
Description  Programmable 1-PLL Clock Synthesizer and Jitter Cleaner With 2.5-V and 3.3-V Outputs
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

CDCE813QPWRQ1 Datasheet(HTML) 10 Page - Texas Instruments

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CDCE813-Q1
SNAS705 – JANUARY 2017
www.ti.com
Product Folder Links: CDCE813-Q1
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Copyright © 2017, Texas Instruments Incorporated
9.3 Feature Description
9.3.1 Control Terminal Configuration
The CDCE813-Q1 device has three user-definable control terminals (S0, S1, and S2), which allow external
control of device settings. They can be programmed to any of the following functions:
Spread-spectrum clocking selection
→ spread type and spread amount selection
Frequency selection
→ switching between any of two user-defined frequencies
Output state selection
→ output configuration and power-down control
The user can predefine up to eight different control settings. Table 1 and Table 2 explain these settings.
Table 1. Control Terminal Definition
EXTERNAL CONTROL
BITS
PLL1 SETTING
Y1 SETTING
Control function
PLL frequency
selection
SSC selection
Output Y2 and Y3
selection
Output Y1 and power-down selection
(1)
Center and down-spread, Frequency0, Frequency1, State0, and State1 are user-definable in PLL1
configuration register.
Table 2. PLL1 Setting (1)
SSCx [3 BITS]
CENTER
DOWN
SSC SELECTION (CENTER AND DOWN)
0
0
0
0% (off)
0% (off)
0
0
1
±0.25%
–0.25%
0
1
0
±0.5%
–0.5%
0
1
1
±0.75%
–0.75%
1
0
0
±1.0%
–1.0%
1
0
1
±1.25%
–1.25%
1
1
0
±1.5%
–1.5%
1
1
1
±2.0%
–2.0%
(1)
Frequency0 and Frequency1 can be any frequency within the
specified fVCO range.
Table 3. PLL1 Setting, Frequency Selection (1)
FSx
FUNCTION
0
Frequency 0
1
Frequency 1
(1)
State0 or State1 selection is valid for both outputs of the
corresponding PLL module and can be power down, Hi-Z state, low,
or active.
Table 4. PLL1 Setting, Output Selection (Y2, Y3) (1)
Y2, Y3
FUNCTION
0
State 0
1
State 1


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