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MAAP-018260-001SMB Datasheet(PDF) 4 Page - M/A-COM Technology Solutions, Inc.

Part # MAAP-018260-001SMB
Description  Fully Integrated Power Amplifier
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Manufacturer  MA-COM [M/A-COM Technology Solutions, Inc.]
Direct Link  http://www.macomtech.com
Logo MA-COM - M/A-COM Technology Solutions, Inc.

MAAP-018260-001SMB Datasheet(HTML) 4 Page - M/A-COM Technology Solutions, Inc.

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Power Amplifier
18 - 26 GHz
Rev. V2
MAAP-018260
4
MACOM Technology Solutions Inc. (MACOM) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice.
Visit www.macom.com for additional data sheets and product information.
For further information and support please visit:
https://www.macom.com/support
DC-0009795
Handling Procedures
Please observe the following precautions to avoid
damage:
Static Sensitivity
These
electronic
devices
are
sensitive
to
electrostatic discharge (ESD) and can be damaged
by static electricity. Proper ESD control techniques
should be used when handling these CDM class C1,
HBM Class 0A devices.
Biasing
All gates should be pinched-off, VG < -2 V, before
applying the drain voltage, VD = 5 V (do not exceed
maximum VDG value for RF drive condition). Then
the gate voltages can be increased until the desired
quiescent drain current is reached in each stage.
The recommended quiescent bias is VD = 5 V,
ID1+ID2+ID3+ID4 = 1300 mA (total). The performance in
this datasheet has been measured with a fixed gate
voltage and no drain current regulation under large
signal operation. It is also possible to regulate the
drain current dynamically, to limit the DC power
dissipation under RF drive. To turn off the device,
the turn on bias sequence should be followed in
reverse.
Detector Operation
MAAP-018260 includes a power and envelope de-
tector. As per the application schematic, the power
detector requires an external 5 V supply and the en-
velope detector requires -5 V. The output from the
resistive voltage divider can be fed into a ADC or
multimeter for the result.
Bias Arrangement
Each DC pin (VD1,2, VD3, VD4 and VG1,2, VG3,4) needs
to have bypass capacitance of 100 nF mounted as
close to the packaged device as possible.


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