MC54/74HCT373A

High–Speed CMOS Logic Data

DL129 — Rev 6

3

MOTOROLA

Unit

Guaranteed Limit

VCC

V

Test Conditions

Parameter

Symbol

Unit

v 125_C

v 85_C

– 55 to

25

_C

VCC

V

Test Conditions

Parameter

Symbol

IOZ

Maximum Three–State

Leakage Current

Output in High–Impedance State

Vin = VIL or VIH

Vout = VCC or GND

5.5

± 0.5

± 5.0

± 10

µA

ICC

Maximum Quiescent Supply

Current (per Package)

Vin = VCC or GND

Iout = 0 µA

5.5

4.0

40

160

µA

∆ICC

Additional Quiescent Supply

Current

Vin = 2.4 V, Any One Input

Vin = VCC or GND, Other Inputs

5.5

≥ –55_C

25

_C to 125_C

mA

Current

Vin = VCC or GND, Other Inputs

lout = 0 µA

2.9

2.4

NOTE: 1. Total Supply Current = ICC + Σ∆ICC.

NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).

Sb l

P

Guaranteed Limit

Ui

Symbol

Parameter

– 55 to

25

_C

v 85_C

v 125_C

Unit

tPLH,

tPHL

Maximum Propagation Delay, Input D to Q

(Figures 1 and 5)

28

35

42

ns

tPLH,

tPHL

Maximum Propagation Delay, Latch Enable to Q

(Figures 2 and 5)

32

40

48

ns

tPLZ,

tPHZ

Maximum Propagation Delay, Output Enable to Q

(Figures 3 and 6)

30

38

45

ns

tPZL,

tPZH

Maximum Propagation Delay, Output Enable to Q

(Figures 3 and 6)

35

44

53

ns

tTLH,

tTHL

Maximum Output Transition Time, Any Output

(Figures 1 and 5)

12

15

18

ns

Cin

Maximum Input Capacitance

10

10

10

pF

Cout

Maximum Three–State Output Capacitance

(Output in High–Impedance State)

15

15

15

pF

NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the Motorola High–

Speed CMOS Data Book (DL129/D).

C

P

Di

i

i

C

i

(P

L

h)*

Typical @ 25

°C, VCC = 5.0 V

F

CPD

Power Dissipation Capacitance (Per Latch)*

65

pF

* Used to determine the no–load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the

Motorola High–Speed CMOS Data Book (DL129/D).

Sb l

P

Guaranteed Limit

Ui

Symbol

Parameter

– 55 to

25

_C

v 85_C

v 125_C

Unit

tsu

Minimum Setup Time, Input D to Latch Enable

(Figure 4)

10

13

15

ns

th

Minimum Hold Time, Latch Enable to Input D

(Figure 4)

10

13

15

ns

tw

Minimum Pulse Width, Latch Enable

(Figure 2)

12

15

18

ns

tr, tf

Maximum Input Rise and Fall Times

(Figure 1)

500

500

500

ns