MC54/74HC4060

MOTOROLA

High–Speed CMOS Logic Data

DL129 — Rev 6

6

Figure 6. Pierce Crystal Oscillator Circuit

RESET

12

11 OSC IN

10 OSC OUT 1

9 OSC OUT 2

Rf

R1

C1

C2

Table 1. Crystal Oscillator Amplifier Specifications

TA = 25_C (Input = Pin 11, Output = Pin 10)

Type

Input Resistance, Rin

Output Impedance, Zout (4.5 V supply)

Input Capacitance, Cin

Output Capacitance, Cout

Series Capacitance, Ca

3 Vdc supply

Open loop voltage

4 Vdc supply

gain with output at

5 Vdc supply

full swing,

α

6 Vdc supply

Positive Reactance (Pierce)

60 M

Ω minimum

200

Ω (see text)

5 pF typical

7 pF typical

5 pF typical

5.0 expected minimum

4.0 expected minimum

3.3 expected minimum

3.1 expected minimum

PIERCE CRYSTAL OSCILLATOR DESIGN

Figure 7. Equivalent Crystal Networks

2

1

2

1

2

1

RS

Xe

Re

LS

CS

CO

Values are supplied by crystal manufacturer (parallel resonant crys-

tal)

Figure 8. Series Equivalent Crystal Load

Figure 9. Parasitic Capacitances

of the Amplifier

NOTE: C = C1 + Cin and R = R1 + Rout. Co is considered as part of the

load. Ca and Rf typically have minimal effect below 2 MHz.

Values are listed in Table 1.

Rs

jXLs

–jXCs

Zload

–jXCo

–jXC2

–jXC

R

Rload

Xload

Cin

Cout

Ca