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70T3599S133DRG8 Datasheet(PDF) 10 Page - Integrated Device Technology

Part # 70T3599S133DRG8
Description  HIGH-SPEED 2.5V 256/128/64K x 36 SYNCHRONOUS DUAL-PORT STATIC RAM
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

70T3599S133DRG8 Datasheet(HTML) 10 Page - Integrated Device Technology

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6.42
IDT70T3519/99/89S
High-Speed 2.5V 256/128/64K x 36 Dual-Port Synchronous Static RAM
Industrial and Commercial Temperature Ranges
10
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range (3) (VDD = 2.5V ± 100mV)
NOTES:
1. At f = fMAX, address and control lines (except Output Enable) are cycling at the maximum frequency clock cycle of 1/tCYC, using "AC TEST CONDITIONS".
2. f = 0 means no address, clock, or control lines change. Applies only to input at CMOS level standby.
3. Port "A" may be either left or right port. Port "B" is the opposite from port "A".
4. VDD = 2.5V, TA = 25°C for Typ, and are not production tested. IDD DC(f=0) = 15mA (Typ).
5. CEX = VIL means CE0X = VIL and CE1X = VIH
CEX
= VIH means CE0X = VIH or CE1X = VIL
CEX
< 0.2V means CE0X < 0.2V and CE1X > VDDQ - 0.2V
CEX
> VDDQ - 0.2V means CE0X > VDDQ - 0.2V or CE1X - 0.2V
"X" represents "L" for left port or "R" for right port.
6. ISB1, ISB2 and ISB4 will all reach full standby levels (ISB3) on the appropriate port(s) if ZZL and/or ZZR = VIH.
7. 166MHz I-Temp is not available in the BF208 package.
8. 200Mhz is not available in the BF208 and DR208 packages.
70T3519/99/89
S200
Com'l Only(8)
70T3519/99/89
S166
Com'l
& Ind(7)
70T3519/99/89
S133
Com'l
& Ind
Symbol
Parameter
Test Condition
Version
Typ.(4)
Max.
Typ.(4)
Max.
Typ.(4)
Max.
Unit
IDD
Dynamic Operating
Current (Both
Ports Active)
CEL
and CER= VIL,
Outputs Disabled,
f = fMAX(1)
COM'L
S
375
525
320
450
260
370
mA
IND
S
___
___
320
510
260
450
ISB1(6)
Standby Current
(Both Ports - TTL
Level Inputs)
CEL
= CER = VIH
f = fMAX(1)
COM'L
S
205
270
175
230
140
190
mA
IND
S
___
___
175
275
140
235
ISB2(6)
Standby Current
(One Port - TTL
Level Inputs)
CE"A"
= VIL and CE"B" = VIH(5)
Active Port Outputs Disabled,
f=fMAX(1)
COM'L
S
300
375
250
325
200
250
mA
IND
S
___
___
250
365
200
310
ISB3
Full Standby Current
(Both Ports - CMOS
Level Inputs)
Both Ports CEL and
CER
> VDDQ - 0.2V, VIN > VDDQ - 0.2V
or VIN < 0.2V, f = 0(2)
COM'L
S
5
15
5
15
5
15
mA
IND
S
___
___
520520
ISB4(6)
Full Standby Current
(One Port - CMOS
Level Inputs)
CE"A"
< 0.2V and CE"B" > VDDQ - 0.2V(5)
VIN > VDDQ - 0.2V or VIN < 0.2V
Active Port, Outputs Disabled, f = fMAX(1)
COM'L
S
300
375
250
325
200
250
mA
IND
S
___
___
250
365
200
310
Izz
Sleep Mode Current
(Both Ports - TTL
Level Inputs)
ZZL = ZZR = VIH
f=fMAX(1)
COM'L
S
5
15
5
15
5
15
mA
IND
S
___
___
520520
5666 tbl 09


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