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LM7805CT Datasheet(PDF) 4 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
Part # LM7805CT
Description  Series 3-Terminal Positive Regulators
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM7805CT Datasheet(HTML) 4 Page - National Semiconductor (TI)

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LM340/LM7800C
Electrical Characteristics (Note 4)
0˚C
≤ T
J ≤ +125˚C unless otherwise specified
Output Voltage
5V
12V
15V
Symbol
Input Voltage (unless otherwise noted)
10V
19V
23V
Units
Parameter
Conditions
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
VO
Output Voltage
TJ = 25˚C, 5 mA ≤ IO ≤ 1A
4.8
5
5.2
11.5
12
12.5
14.4
15
15.6
V
PD ≤ 15W, 5 mA ≤ IO ≤ 1A
4.75
5.25
11.4
12.6 14.25
15.75
V
VMIN ≤ VIN ≤ VMAX
(7.5
≤ V
IN ≤ 20)
(14.5
≤ V
IN ≤ 27)
(17.5
≤ V
IN ≤ 30)
V
∆V
O
Line Regulation
IO = 500 mA
TJ = 25˚C
3
50
4
120
4
150
mV
∆V
IN
(7
≤ V
IN ≤ 25)
(14.5
≤ V
IN ≤ 30)
(17.5
≤ V
IN ≤ 30)
V
0˚C
≤ T
J ≤ +125˚C
50
120
150
mV
∆V
IN
(8
≤ V
IN ≤ 20)
(15
≤ V
IN ≤ 27)
(18.5
≤ V
IN ≤ 30)
V
IO ≤ 1A
TJ = 25˚C
50
120
150
mV
∆V
IN
(7.5
≤ V
IN ≤ 20)
(14.6
≤ V
IN ≤ 27)
(17.7
≤ V
IN ≤ 30)
V
0˚C
≤ T
J ≤ +125˚C
25
60
75
mV
∆V
IN
(8
≤ V
IN ≤ 12)
(16
≤ V
IN ≤ 22)
(20
≤ V
IN ≤ 26)
V
∆V
O
Load Regulation
TJ = 25˚C
5 mA
≤ I
O ≤ 1.5A
10
50
12
120
12
150
mV
250 mA
≤ I
O ≤ 750 mA
25
60
75
mV
5mA
≤ I
O ≤ 1A, 0˚C ≤ TJ ≤ +125˚C
50
120
150
mV
IQ
Quiescent Current
IO ≤ 1A
TJ = 25˚C
8
8
8
mA
0˚C
≤ T
J ≤ +125˚C
8.5
8.5
8.5
mA
∆I
Q
Quiescent Current
5 mA
≤ I
O ≤ 1A
0.5
0.5
0.5
mA
Change
TJ = 25˚C, IO ≤ 1A
1.0
1.0
1.0
mA
VMIN ≤ VIN ≤ VMAX
(7.5
≤ V
IN ≤ 20)
(14.8
≤ V
IN ≤ 27)
(17.9
≤ V
IN ≤ 30)
V
IO ≤ 500 mA, 0˚C ≤ TJ ≤ +125˚C
1.0
1.0
1.0
mA
VMIN ≤ VIN ≤ VMAX
(7
≤ V
IN ≤ 25)
(14.5
≤ V
IN ≤ 30)
(17.5
≤ V
IN ≤ 30)
V
VN
Output Noise Voltage
TA = 25˚C, 10 Hz ≤ f ≤ 100 kHz
40
75
90
µV
Ripple Rejection
IO ≤ 1A, TJ = 25˚C
62
80
55
72
54
70
dB
f = 120 Hz
or IO ≤ 500 mA,
62
55
54
dB
0˚C
≤ T
J ≤ +125˚C
VMIN ≤ VIN ≤ VMAX
(8
≤ V
IN ≤ 18)
(15
≤ V
IN ≤ 25)
(18.5
≤ V
IN
28.5)
V
RO
Dropout Voltage
TJ = 25˚C, IO = 1A
2.0
2.0
2.0
V
Output Resistance
f = 1 kHz
8
18
19
m
Short-Circuit Current
TJ = 25˚C
2.1
1.5
1.2
A
Peak Output Current
TJ = 25˚C
2.4
2.4
2.4
A
Average TC of VOUT
0˚C
≤ T
J ≤ +125˚C, IO = 5 mA
−0.6
−1.5
−1.8
mV/˚C
VIN
Input Voltage
TJ = 25˚C, IO ≤ 1A
Required to Maintain
7.5
14.6
17.7
V
Line Regulation
Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Conditions are conditions under which the device functions
but the specifications might not be guaranteed. For guaranteed specifications and test conditions see the Electrical Characteristics.
Note 2: The maximum allowable power dissipation at any ambient temperature is a function of the maximum junction temperature for operation (TJMAX = 125˚C or
150˚C), the junction-to-ambient thermal resistance (
θJA), and the ambient temperature (TA). PDMAX = (TJMAX −TA)/θJA. If this dissipation is exceeded, the die tem-
perature will rise above TJMAX and the electrical specifications do not apply. If the die temperature rises above 150˚C, the device will go into thermal shutdown. For
the TO-3 package (K, KC), the junction-to-ambient thermal resistance (
θJA) is 39˚C/W. When using a heatsink, θJA is the sum of the 4˚C/W junction-to-case thermal
resistance (
θJC) of the TO-3 package and the case-to-ambient thermal resistance of the heatsink. For the TO-220 package (T), θJA is 54˚C/W and θJC is 4˚C/W. If
SOT-223 is used, the junction-to-ambient thermal resistance is 174˚C/W and can be reduced by a heatsink (see Applications Hints on heatsinking).
If the TO-263 package is used, the thermal resistance can be reduced by increasing the PC board copper area thermally connected to the package: Using 0.5 square
inches of copper area,
θJA is 50˚C/W; with 1 square inch of copper area, θJAis 37˚C/W; and with 1.6 or more inches of copper area, θJA is 32˚C/W.
Note 3: ESD rating is based on the human body model, 100 pF discharged through 1.5 k
Ω.
Note 4: All characteristics are measured with a 0.22 µF capacitor from input to ground and a 0.1 µF capacitor from output to ground. All characteristics except noise
voltage and ripple rejection ratio are measured using pulse techniques (tw ≤ 10 ms, duty cycle ≤ 5%). Output voltage changes due to changes in internal temperature
must be taken into account separately.
Note 5: A military RETS specification is available on request. At the time of printing, the military RETS specifications for the LM140AK-5.0/883, LM140AK-12/883,
and LM140AK-15/883 complied with the min and max limits for the respective versions of the LM140A. At the time of printing, the military RETS specifications for
the LM140K-5.0/883, LM140K-12/883, and LM140K-15/883 complied with the min and max limits for the respective versions of the LM140. The LM140H/883,
LM140K/883, and LM140AK/883 may also be procured as a Standard Military Drawing.
www.national.com
4


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