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KH560 Datasheet(PDF) 10 Page - Fairchild Semiconductor |
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KH560 Datasheet(HTML) 10 Page - Fairchild Semiconductor |
10 / 13 page DATA SHEET KH560 10 REV. 1A February 2001 the impact internal amplifier characteristics have on the signal gain. Both the output DC error and noise model may be developed using the equivalent model of Figure 5. Generally, non-inverting input errors show up at the output with the same gain as the input signal, while the inverting current errors have a gain of simply (Rf - Ro) to the output voltage (neglecting the Ro to RL attenuation). Output DC Offset: The DC error terms shown in the specification listing along with the model of Figure 5 may be used to estimate the output DC offset voltage and drift. Each term shown in the specification listing can be of either polarity. While the equations shown below are for output offset voltage, the same equation may be used for the drift with each term replaced by its temperature drift value shown in the specification listing. Recall that the source impedance, Rs, includes both the terminating and signal source impedance and that the actual DC level to the load includes the voltage divider between Ro and RL. Also note that for the KH560, as well as for all current feedback amplifiers, the non-inverting and inverting bias currents do not track each other in either magnitude or polarity. Hence, there is no meaning in an offset current specification, and source impedance matching to cancel bias currents is ineffective. Noise Analysis: Although the DC error terms are in fact random, the cal- culation shown above assumes they are all additive in a worst case sense. The effect of all the various noise sources are combined as a root sum of squared terms to get an overall expression for the spot noise voltage. The circuit of Figure 8 shows the equivalent circuit with all the various noise voltages and currents included along with their gains to the output. where: Gain to eo eni – non-inverting input voltage noise Av ini – non-inverting input current noise AvRs ii – inverting input current noise Rf - Ro Av Rf - Ro 1 1 Figure 8: Equivalent Noise Model To get an expression for the equivalent output noise volt- age, each of these noise voltage and current terms must be taken to the output through their appropriate gains and combined as the root sum of squares. Where the 4kT(Rf - Ro) Av term is the combined noise power of Rg and Rf - Ro. It is often more useful to show the noise as an equivalent input spot noise voltage where every term shown above is reflected to the input. This allows a direct measure of the input signal to noise ratio. This is done by dividing every term inside the radical by the signal voltage gain squared. This, and an example calculation for the circuit of Figure 1, are shown below. Note that RL may be neglected in this calculation. VI R V 1 RR R IR R where: I non inverting bias current I inverting bias current V input offset voltage V 5 A 25 2.0mV 10 10 A 360 12.4mV attentuation between R and R os bn s io f o g bi f o bn bi io o oL 1/ 2 =⋅ ± ()⋅+ − ±− () ≡− ≡ ≡ =⋅ ± () ± () [] =± ↑ µµ ΩΩ L An example calculation for the circuit in Figure 1 using typical 25°C DC error terms and Rs = 25Ω, RL = 50Ω yields: Rg ii eo Ro Rf - Ro Classical op-amp + - √4kTRVo √4kT(Rf - Ro) * * √4kTRs √4kT Rg * * Rs ini * * * eni 4 4 4 4 kTR source resis ce voltage noise kT R gain settling resistor noise current kT R R feedback resistor voltage noise kTR output resistor voltage noise s g f o o − − − () − − tan / e e i R kTR A i R R kT R R A kTR oni ni s s v i f o f ov o =+ () + () +− () +− () + 2 2 22 2 4 44 L e e i R kTR iR R A kT R R A kTR A nni ni s s i f o v f o v o v =+ () ++ − () + − () + 2 2 2 2 2 2 4 4 4 L DC |
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