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HY62WT08081E-DPI Datasheet(PDF) 8 Page - Hynix Semiconductor |
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HY62WT08081E-DPI Datasheet(HTML) 8 Page - Hynix Semiconductor |
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8 / 13 page  HY62WT08081E Series Rev 04 / May. 2001 7 TIMING DIAGRAM READ CYCLE 1 ADDR OE CS Data Out Data Valid tRC tACS tCLZ tOE tOLZ tAA tOH tOHZ tCHZ High-Z Note(READ CYCLE): 1. tCHZ and tOHZ are defined as the time at which the outputs achieve the open circuit conditions and arenot referenced to output voltage levels. 2. At any given temperature and voltage condition, tCHZ max. is less than tCLZ min. both for a given device and from device to device. 3. /WE is high for the read cycle. READ CYCLE 2 tRC tAA Data Valid Previous Data tOH tOH ADDR Data Out Note(READ CYCLE): 1. /WE is high for the read cycle. 2. Device is continuously selected /CS= VIL. 3. /OE =VIL. |
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